lkml.org 
[lkml]   [2020]   [Jan]   [14]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
Date
SubjectRe: [PATCH v3 2/2] riscv: Add support to determine no. of L2 cache way enabled
On Mon, Jan 13, 2020 at 12:09 PM Yash Shah <yash.shah@sifive.com> wrote:
>
> In order to determine the number of L2 cache ways enabled at runtime,
> implement a private attribute ("number_of_ways_enabled"). Reading this
> attribute returns the number of enabled L2 cache ways at runtime.
>
> Using riscv_set_cacheinfo_ops() hook a custom function, that returns
> this private attribute, to the generic ops structure which is used by
> cache_get_priv_group() in cacheinfo framework.
>
> Signed-off-by: Yash Shah <yash.shah@sifive.com>
> ---
> drivers/soc/sifive/sifive_l2_cache.c | 38 ++++++++++++++++++++++++++++++++++++
> include/soc/sifive/sifive_l2_cache.h | 2 ++
> 2 files changed, 40 insertions(+)
>
> diff --git a/drivers/soc/sifive/sifive_l2_cache.c b/drivers/soc/sifive/sifive_l2_cache.c
> index a506939..8741885 100644
> --- a/drivers/soc/sifive/sifive_l2_cache.c
> +++ b/drivers/soc/sifive/sifive_l2_cache.c
> @@ -9,6 +9,8 @@
> #include <linux/interrupt.h>
> #include <linux/of_irq.h>
> #include <linux/of_address.h>
> +#include <linux/device.h>
> +#include <asm/cacheinfo.h>
> #include <soc/sifive/sifive_l2_cache.h>
>
> #define SIFIVE_L2_DIRECCFIX_LOW 0x100
> @@ -31,6 +33,7 @@
>
> static void __iomem *l2_base;
> static int g_irq[SIFIVE_L2_MAX_ECCINTR];
> +static struct riscv_cacheinfo_ops l2_cache_ops;
>
> enum {
> DIR_CORR = 0,
> @@ -107,6 +110,38 @@ int unregister_sifive_l2_error_notifier(struct notifier_block *nb)
> }
> EXPORT_SYMBOL_GPL(unregister_sifive_l2_error_notifier);
>
> +int sifive_l2_largest_wayenabled(void)
> +{
> + return readl(l2_base + SIFIVE_L2_WAYENABLE);
> +}

The sifine_l2_largest_wayenabled() is not called from anywhere else
so make it static and rename it to l2_largest_wayenabled().

> +
> +static ssize_t number_of_ways_enabled_show(struct device *dev,
> + struct device_attribute *attr,
> + char *buf)
> +{
> + return sprintf(buf, "%u\n", sifive_l2_largest_wayenabled());
> +}
> +
> +static DEVICE_ATTR_RO(number_of_ways_enabled);
> +
> +static struct attribute *priv_attrs[] = {
> + &dev_attr_number_of_ways_enabled.attr,
> + NULL,
> +};
> +
> +static const struct attribute_group priv_attr_group = {
> + .attrs = priv_attrs,
> +};
> +
> +const struct attribute_group *l2_get_priv_group(struct cacheinfo *this_leaf)
> +{
> + /* We want to use private group for L2 cache only */
> + if (this_leaf->level == 2)
> + return &priv_attr_group;
> + else
> + return NULL;
> +}
> +
> static irqreturn_t l2_int_handler(int irq, void *device)
> {
> unsigned int add_h, add_l;
> @@ -170,6 +205,9 @@ static int __init sifive_l2_init(void)
>
> l2_config_read();
>
> + l2_cache_ops.get_priv_group = l2_get_priv_group;
> + riscv_set_cacheinfo_ops(&l2_cache_ops);
> +
> #ifdef CONFIG_DEBUG_FS
> setup_sifive_debug();
> #endif
> diff --git a/include/soc/sifive/sifive_l2_cache.h b/include/soc/sifive/sifive_l2_cache.h
> index 92ade10..55feff5 100644
> --- a/include/soc/sifive/sifive_l2_cache.h
> +++ b/include/soc/sifive/sifive_l2_cache.h
> @@ -10,6 +10,8 @@
> extern int register_sifive_l2_error_notifier(struct notifier_block *nb);
> extern int unregister_sifive_l2_error_notifier(struct notifier_block *nb);
>
> +int sifive_l2_largest_wayenabled(void);
> +

You can drop the sifive_l2_largest_wayenabled() declaration from here.

> #define SIFIVE_L2_ERR_TYPE_CE 0
> #define SIFIVE_L2_ERR_TYPE_UE 1
>
> --
> 2.7.4
>

Apart from above it looks good.

Reviewed-by: Anup Patel <anup@brainfault.org>

Regards,
Anup

\
 
 \ /
  Last update: 2020-01-14 06:00    [W:0.054 / U:4.896 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site