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    Subject[PATCH 5/6] MIPS: CI20: Modify DTS to support high resolution timer for SMP.
    Date
    Modify DTS, change tcu channel from 2 to 3, channel #0 and #1 for
    per core local timer, #2 for clocksource.

    Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
    ---
    arch/mips/boot/dts/ingenic/ci20.dts | 11 +++++++++--
    1 file changed, 9 insertions(+), 2 deletions(-)

    diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts
    index 37b9316..98c4c42 100644
    --- a/arch/mips/boot/dts/ingenic/ci20.dts
    +++ b/arch/mips/boot/dts/ingenic/ci20.dts
    @@ -456,6 +456,13 @@

    &tcu {
    /* 3 MHz for the system timer and clocksource */
    - assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>;
    - assigned-clock-rates = <3000000>, <3000000>;
    + assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
    + <&tcu TCU_CLK_TIMER2>;
    + assigned-clock-rates = <3000000>, <3000000>, <750000>;
    +
    + /*
    + * Use channel #0 and #1 for the per core system timer,
    + * and use channel #2 for the clocksource.
    + */
    + ingenic,pwm-channels-mask = <0xF8>;
    };
    --
    2.7.4
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