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SubjectRe: [PATCH v6 1/3] dt-bindings: soc: add mtk svs dt-bindings
On Thu, Jan 9, 2020 at 4:38 AM Rob Herring <robh@kernel.org> wrote:
>
> On Tue, Jan 07, 2020 at 03:01:52PM +0800, Roger Lu wrote:
> > Document the binding for enabling mtk svs on MediaTek SoC.
> >
> > Signed-off-by: Roger Lu <roger.lu@mediatek.com>
> > ---
> > .../devicetree/bindings/power/mtk-svs.txt | 76 +++++++++++++++++++
> > 1 file changed, 76 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/power/mtk-svs.txt
> >
> > diff --git a/Documentation/devicetree/bindings/power/mtk-svs.txt b/Documentation/devicetree/bindings/power/mtk-svs.txt
> > new file mode 100644
> > index 000000000000..9a3e81b9e1d2
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/power/mtk-svs.txt
> > @@ -0,0 +1,76 @@
> > +* Mediatek Smart Voltage Scaling (MTK SVS)
> > +
> > +This describes the device tree binding for the MTK SVS controller (bank)
> > +which helps provide the optimized CPU/GPU/CCI voltages. This device also
> > +needs thermal data to calculate thermal slope for accurately compensate
> > +the voltages when temperature change.
> > +
> > +Required properties:
> > +- compatible:
> > + - "mediatek,mt8183-svs" : For MT8183 family of SoCs
> > +- reg: Address range of the MTK SVS controller.
> > +- interrupts: IRQ for the MTK SVS controller.
> > +- clocks, clock-names: Clocks needed for the svs hardware. required
> > + clocks are:
> > + "main": Main clock for svs controller to work.
> > +- nvmem-cells: Phandle to the calibration data provided by a nvmem device.
> > +- nvmem-cell-names: Should be "svs-calibration-data" and "calibration-data"
> > +
> > +Subnodes:
> > +- svs-cpu-little: SVS bank device node of little CPU
> > + compatible: "mediatek,mt8183-svs-cpu-little"
> > + operating-points-v2: OPP table hooked by SVS little CPU bank.
> > + SVS will optimze this OPP table voltage part.
> > + vcpu-little-supply: PMIC buck of little CPU
> > +- svs-cpu-big: SVS bank device node of big CPU
> > + compatible: "mediatek,mt8183-svs-cpu-big"
> > + operating-points-v2: OPP table hooked by SVS big CPU bank.
> > + SVS will optimze this OPP table voltage part.
> > + vcpu-big-supply: PMIC buck of big CPU
> > +- svs-cci: SVS bank device node of CCI
> > + compatible: "mediatek,mt8183-svs-cci"
> > + operating-points-v2: OPP table hooked by SVS CCI bank.
> > + SVS will optimze this OPP table voltage part.
> > + vcci-supply: PMIC buck of CCI
> > +- svs-gpu: SVS bank device node of GPU
> > + compatible: "mediatek,mt8183-svs-gpu"
> > + operating-points-v2: OPP table hooked by SVS GPU bank.
> > + SVS will optimze this OPP table voltage part.
> > + vgpu-supply: PMIC buck of GPU
> > +
> > +Example:
> > +
> > + svs: svs@1100b000 {
> > + compatible = "mediatek,mt8183-svs";
> > + reg = <0 0x1100b000 0 0x1000>;
> > + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_LOW>;
> > + clocks = <&infracfg CLK_INFRA_THERM>;
> > + clock-names = "main_clk";
> > + nvmem-cells = <&svs_calibration>, <&thermal_calibration>;
> > + nvmem-cell-names = "svs-calibration-data", "calibration-data";
> > +
> > + svs_cpu_little: svs-cpu-little {
> > + compatible = "mediatek,mt8183-svs-cpu-little";
> > + operating-points-v2 = <&cluster0_opp>;
> > + vcpu-little-supply = <&mt6358_vproc12_reg>;
> > + };
>
> I don't think this is a good binding. This information already exists
> elsewhere in the DT, so your driver should just look in those nodes.
> For example the regulator can be in the cpu nodes or the OPP table
> itself.

Roger, if that helps, without changing any other binding, on 8183,
basically you could have:
- svs-cpu-little: Add a handle to &cpu0 and get the regulator/opp
table from it.
- svs-cpu-big: Handle to &cpu4
- svs-cci: Handle to &cci
- svs-gpu: Handle to &gpu (BTW, it is expected that SVS would only
apply to vgpu/mali regulator, and not vsram regulator?)

I'm not too sure how we'd fetch the right regulator name, however (for
the first 3 the name is "proc", for the last one it's "mali"), maybe
add a regulator-name list in the DT?

>
> Rob

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