lkml.org 
[lkml]   [2020]   [Jan]   [12]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
Patch in this message
/
From
Subject[PATCH v12 7/8] PCI/DPC: Clear AER registers in EDR mode
Date
From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>

As per PCI firmware specification r3.2 System Firmware Intermediary
(SFI) _OSC and DPC Updates ECR
(https://members.pcisig.com/wg/PCI-SIG/document/13563), sec titled
"DPC Event Handling Implementation Note", page 10, OS is responsible
for clearing the AER registers in EDR mode. So clear AER registers in
dpc_process_error() function.

Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Acked-by: Keith Busch <keith.busch@intel.com>
---
drivers/pci/pcie/dpc.c | 4 ++++
1 file changed, 4 insertions(+)

diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c
index 412e4d63cc37..49e020d46ea1 100644
--- a/drivers/pci/pcie/dpc.c
+++ b/drivers/pci/pcie/dpc.c
@@ -284,6 +284,10 @@ static void dpc_process_error(struct dpc_dev *dpc)
pci_aer_clear_fatal_status(pdev, 0);
}

+ /* In EDR mode, OS is responsible for clearing AER registers */
+ if (pcie_aer_get_firmware_first(pdev))
+ pci_cleanup_aer_error_status_regs(pdev, 0);
+
/*
* Irrespective of whether the DPC event is triggered by
* ERR_FATAL or ERR_NONFATAL, since the link is already down,
--
2.21.0
\
 
 \ /
  Last update: 2020-01-12 23:46    [W:0.097 / U:5.684 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site