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SubjectRe: [RESEND PATCH v10 03/10] mmu: spp: Add SPP Table setup functions
On Thu, Jan 02, 2020 at 02:13:12PM +0800, Yang Weijiang wrote:
> SPPT is a 4-level paging structure similar to EPT, when SPP is
> armed for target physical page, bit 61 of the corresponding
> EPT entry is flaged, then SPPT is traversed with the gfn,
> the leaf entry of SPPT contains the access bitmap of subpages
> inside the target 4KB physical page, one bit per 128-byte subpage.
>
> Co-developed-by: He Chen <he.chen@linux.intel.com>
> Signed-off-by: He Chen <he.chen@linux.intel.com>
> Co-developed-by: Zhang Yi <yi.z.zhang@linux.intel.com>
> Signed-off-by: Zhang Yi <yi.z.zhang@linux.intel.com>
> Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
> ---
> arch/x86/include/asm/kvm_host.h | 5 +-
> arch/x86/kvm/mmu/spp.c | 228 ++++++++++++++++++++++++++++++++
> arch/x86/kvm/mmu/spp.h | 10 ++

This patch is completely untesteable. It adds spp.c but doesn't compile
it. Actually, everything up until patch 06 is untestable.

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