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SubjectRe: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
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On 27/09/2019 18:37, Tero Kristo wrote:

> If you can provide details about what clock framework / driver does
> wrong (sample clk_set_xyz call sequence, expected results via
> clk_get_xyz, and what fails), I can take a look at it. Just reporting
> arbitrary display driver issues I won't be able to debug at all (I don't
> have access to any of the displays, nor do I want to waste time
> debugging them without absolutely no knowledge whatsoever.)

I used your hack patches to allow changing rates via debugfs. And set
dss1_alwon_fck_3430es2 to 27000000 or 27870967. The end result was that
DSS gets some very high clock from dss1_alwon_fck_3430es2, as the frame
rate jumps to many hundreds fps.

So, these numbers are not real, but to give the idea what I saw. Running
first with 50 MHz, I can see, say, 40 fps. Then I set the clock to 30
MHz, and fps dropped to, say, 30fps, as expected with lower clock. Then
I set the clock to 27MHz (or the other one), expecting a bit lower fps,
but instead I saw hundreds of fps.

I don't know if there's any other way to observe the wrong clock rate
but have the dss enabled and running kmstest or similar. I can help you
set that up next week, should be trivial. You don't need a display for that.

Tomi

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Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

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