lkml.org 
[lkml]   [2019]   [Sep]   [27]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
Date
SubjectRe: [PATCH v1 0/5] Add Tiger Lake/Elkhart Lake support to pmc_core driver
On Fri, Sep 27, 2019 at 9:01 AM Andy Shevchenko
<andy.shevchenko@gmail.com> wrote:
> On Thu, Sep 26, 2019 at 9:43 PM Gayatri Kammela
> <gayatri.kammela@intel.com> wrote:
>
> Thank you for the series, I'll comment them later.
>
> For now, check how to properly setup prefix for all patches. The Title
> all broken.
>

On top of that the fully inconsistent SoC naming through the existing
code / new additions.

I'm pretty sure you need to spell platforms as Tiger Lake, Elkhart
Lake and so on everywhere.

Fix this, but do not send new version till I look at the code here.

> > Patch 1: Cleans up termination lines
> > Patch 2: Refactor driver for ease of adding new SoCs
> > Patch 3: Refactor debugfs entry for PCH IPs power gating status
> > Patch 4: Add Tiger Lake legacy support to pmc_core
> > Patch 5: Add Elkhart Lake legacy support to pmc_core
> >
> > All the information regarding the PCH IPs and names of IPs will be available
> > in *future* Intel's Platform Controller Hub (PCH) External Design Specification
> > (EDS) document.
>
> When?

--
With Best Regards,
Andy Shevchenko

\
 
 \ /
  Last update: 2019-09-27 08:06    [W:0.062 / U:0.896 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site