Messages in this thread | | | From | Stephen Boyd <> | Subject | Re: [PATCH V3 2/4] clk: imx: clk-pll14xx: unbypass PLL by default | Date | Tue, 17 Sep 2019 23:07:26 -0700 |
| |
Quoting Peng Fan (2019-09-08 20:39:39) > From: Peng Fan <peng.fan@nxp.com> > > When registering the PLL, unbypass the PLL. > The PLL has two bypass control bit, BYPASS and EXT_BYPASS. > we will expose EXT_BYPASS to clk driver for mux usage, and keep > BYPASS inside pll14xx usage. The PLL has a restriction that > when M/P change, need to RESET/BYPASS pll to avoid glitch, so > we could not expose BYPASS. > > To make it easy for clk driver usage, unbypass PLL which does > not hurt current function. > > Fixes: 8646d4dcc7fb ("clk: imx: Add PLLs driver for imx8mm soc") > Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> > Signed-off-by: Peng Fan <peng.fan@nxp.com> > ---
Applied to clk-next
| |