Messages in this thread | | | Subject | Re: [PATCH 2/2] MIPS: remove support for DMA_ATTR_WRITE_COMBINE | From | Sergei Shtylyov <> | Date | Mon, 5 Aug 2019 11:06:24 +0300 |
| |
Hello!
On 05.08.2019 11:01, Christoph Hellwig wrote:
> Mips uses the KSEG1 kernel memory segment do map dma coherent
MIPS. s/do/to/?
> allocations for n
on-coherent devices as uncachable, and does not have
Uncacheable?
> any kind of special support for DMA_ATTR_WRITE_COMBINE in the allocation > path. Thus supporting DMA_ATTR_WRITE_COMBINE in dma_mmap_attrs will > lead to multiple mappings with different caching attributes. > > Fixes: 8c172467be36 ("MIPS: Add implementation of dma_map_ops.mmap()") > Signed-off-by: Christoph Hellwig <hch@lst.de> [...]
MBR, Sergei
| |