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SubjectRE: [PATCH] x86/asm: Add support for MOVDIR64B instruction
Date
+Dave, who is the DSA developer. 

Thanks,
Jing

-----Original Message-----
From: Borislav Petkov <bp@alien8.de>
Sent: Friday, August 2, 2019 7:41 AM
To: Luck, Tony <tony.luck@intel.com>
Cc: Kirill A. Shutemov <kirill@shutemov.name>; Alexey Dobriyan <adobriyan@gmail.com>; kirill.shutemov@linux.intel.com; linux-kernel@vger.kernel.org; Lin, Jing <jing.lin@intel.com>; x86@kernel.org
Subject: Re: [PATCH] x86/asm: Add support for MOVDIR64B instruction

On Thu, Aug 01, 2019 at 10:06:27PM +0000, Luck, Tony wrote:
> > I think Tony's in the right direction. We already do dst "sizing"
> > like that for the compiler in clwb().
>
> The clwb case does look like what we want for movdir64b().
>
> But is it right for clwb() ... that doesn't modify anything, just
> pushes things from cache to memory. So why is it using "+m"?

Here some hints from to my notes, if you want to know more detail, I can ping my gcc guy.

It needs to be an input and an output operand so that it prevents gcc from reordering accesses to it after the insn happens, i.e., you don't want to touch it after CLFLUSH has executed.

And also, you want to make sure it works with all gcc versions and this is, I was told, the right way to do it. For example, some gcc versions consider it not limited to 64 bytes of memory being touched but a full memory clobber.

HTH.

--
Regards/Gruss,
Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.
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