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    Subject[PATCH v5 05/13] pwm: mediatek: use pwm_mediatek as common prefix
    Date
    Use pwm_mediatek as common prefix to match the filename.
    No functional change intended.

    Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
    Signed-off-by: Sam Shih <sam.shih@mediatek.com>
    ---
    Changes since v5:
    - Follow reviewers's comments
    The license stuff is a separate change

    Change-Id: I32f421d3eb26438e25edfd6e4f6da0e85c58526c
    ---
    drivers/pwm/pwm-mediatek.c | 112 +++++++++++++++++++------------------
    1 file changed, 57 insertions(+), 55 deletions(-)

    diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c
    index 8d1fd8163f15..0938beb1a3cb 100644
    --- a/drivers/pwm/pwm-mediatek.c
    +++ b/drivers/pwm/pwm-mediatek.c
    @@ -34,15 +34,14 @@
    #define PWM45THRES_FIXUP 0x34

    #define PWM_CLK_DIV_MAX 7
    -
    -struct mtk_pwm_platform_data {
    +struct pwm_mediatek_of_data {
    unsigned int fallback_npwms;
    bool pwm45_fixup;
    bool has_clks;
    };

    /**
    - * struct mtk_pwm_chip - struct representing PWM chip
    + * struct pwm_mediatek_chip - struct representing PWM chip
    * @chip: linux PWM chip representation
    * @regs: base address of PWM chip
    * @clk_top: the top clock generator
    @@ -50,28 +49,30 @@ struct mtk_pwm_platform_data {
    * @clk_pwms: the clock used by each PWM channel
    * @clk_freq: the fix clock frequency of legacy MIPS SoC
    */
    -struct mtk_pwm_chip {
    +struct pwm_mediatek_chip {
    struct pwm_chip chip;
    void __iomem *regs;
    struct clk *clk_top;
    struct clk *clk_main;
    struct clk **clk_pwms;
    unsigned int clk_freq;
    - const struct mtk_pwm_platform_data *soc;
    + const struct pwm_mediatek_of_data *soc;
    };

    -static const unsigned int mtk_pwm_reg_offset[] = {
    +static const unsigned int pwm_mediatek_reg_offset[] = {
    0x0010, 0x0050, 0x0090, 0x00d0, 0x0110, 0x0150, 0x0190, 0x0220
    };

    -static inline struct mtk_pwm_chip *to_mtk_pwm_chip(struct pwm_chip *chip)
    +static inline struct pwm_mediatek_chip *
    +to_pwm_mediatek_chip(struct pwm_chip *chip)
    {
    - return container_of(chip, struct mtk_pwm_chip, chip);
    + return container_of(chip, struct pwm_mediatek_chip, chip);
    }

    -static int mtk_pwm_clk_enable(struct pwm_chip *chip, struct pwm_device *pwm)
    +static int pwm_mediatek_clk_enable(struct pwm_chip *chip,
    + struct pwm_device *pwm)
    {
    - struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip);
    + struct pwm_mediatek_chip *pc = to_pwm_mediatek_chip(chip);
    int ret;

    if (!pc->soc->has_clks)
    @@ -99,9 +100,10 @@ static int mtk_pwm_clk_enable(struct pwm_chip *chip, struct pwm_device *pwm)
    return ret;
    }

    -static void mtk_pwm_clk_disable(struct pwm_chip *chip, struct pwm_device *pwm)
    +static void pwm_mediatek_clk_disable(struct pwm_chip *chip,
    + struct pwm_device *pwm)
    {
    - struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip);
    + struct pwm_mediatek_chip *pc = to_pwm_mediatek_chip(chip);

    if (!pc->soc->has_clks)
    return;
    @@ -111,23 +113,23 @@ static void mtk_pwm_clk_disable(struct pwm_chip *chip, struct pwm_device *pwm)
    clk_disable_unprepare(pc->clk_top);
    }

    -static inline u32 mtk_pwm_readl(struct mtk_pwm_chip *chip, unsigned int num,
    - unsigned int offset)
    +static inline u32 pwm_mediatek_readl(struct pwm_mediatek_chip *chip,
    + unsigned int num, unsigned int offset)
    {
    - return readl(chip->regs + mtk_pwm_reg_offset[num] + offset);
    + return readl(chip->regs + pwm_mediatek_reg_offset[num] + offset);
    }

    -static inline void mtk_pwm_writel(struct mtk_pwm_chip *chip,
    - unsigned int num, unsigned int offset,
    - u32 value)
    +static inline void pwm_mediatek_writel(struct pwm_mediatek_chip *chip,
    + unsigned int num, unsigned int offset,
    + u32 value)
    {
    - writel(value, chip->regs + mtk_pwm_reg_offset[num] + offset);
    + writel(value, chip->regs + pwm_mediatek_reg_offset[num] + offset);
    }

    -static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
    - int duty_ns, int period_ns)
    +static int pwm_mediatek_config(struct pwm_chip *chip, struct pwm_device *pwm,
    + int duty_ns, int period_ns)
    {
    - struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip);
    + struct pwm_mediatek_chip *pc = to_pwm_mediatek_chip(chip);
    unsigned int clk_freq;
    u32 clkdiv = 0, cnt_period, cnt_duty, reg_width = PWMDWIDTH,
    reg_thres = PWMTHRES;
    @@ -139,7 +141,7 @@ static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
    else
    clk_freq = pc->clk_freq;

    - ret = mtk_pwm_clk_enable(chip, pwm);
    + ret = pwm_mediatek_clk_enable(chip, pwm);
    if (ret < 0)
    return ret;

    @@ -156,7 +158,7 @@ static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
    }

    if (clkdiv > PWM_CLK_DIV_MAX) {
    - mtk_pwm_clk_disable(chip, pwm);
    + pwm_mediatek_clk_disable(chip, pwm);
    dev_err(chip->dev, "period %d not supported\n", period_ns);
    return -EINVAL;
    }
    @@ -171,22 +173,22 @@ static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
    }

    cnt_duty = DIV_ROUND_CLOSEST_ULL((u64)duty_ns * 1000, resolution);
    - mtk_pwm_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | clkdiv);
    - mtk_pwm_writel(pc, pwm->hwpwm, reg_width, cnt_period);
    - mtk_pwm_writel(pc, pwm->hwpwm, reg_thres, cnt_duty);
    + pwm_mediatek_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | clkdiv);
    + pwm_mediatek_writel(pc, pwm->hwpwm, reg_width, cnt_period);
    + pwm_mediatek_writel(pc, pwm->hwpwm, reg_thres, cnt_duty);

    - mtk_pwm_clk_disable(chip, pwm);
    + pwm_mediatek_clk_disable(chip, pwm);

    return 0;
    }

    -static int mtk_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
    +static int pwm_mediatek_enable(struct pwm_chip *chip, struct pwm_device *pwm)
    {
    - struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip);
    + struct pwm_mediatek_chip *pc = to_pwm_mediatek_chip(chip);
    u32 value;
    int ret;

    - ret = mtk_pwm_clk_enable(chip, pwm);
    + ret = pwm_mediatek_clk_enable(chip, pwm);
    if (ret < 0)
    return ret;

    @@ -197,29 +199,29 @@ static int mtk_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
    return 0;
    }

    -static void mtk_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
    +static void pwm_mediatek_disable(struct pwm_chip *chip, struct pwm_device *pwm)
    {
    - struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip);
    + struct pwm_mediatek_chip *pc = to_pwm_mediatek_chip(chip);
    u32 value;

    value = readl(pc->regs);
    value &= ~BIT(pwm->hwpwm);
    writel(value, pc->regs);

    - mtk_pwm_clk_disable(chip, pwm);
    + pwm_mediatek_clk_disable(chip, pwm);
    }

    -static const struct pwm_ops mtk_pwm_ops = {
    - .config = mtk_pwm_config,
    - .enable = mtk_pwm_enable,
    - .disable = mtk_pwm_disable,
    +static const struct pwm_ops pwm_mediatek_ops = {
    + .config = pwm_mediatek_config,
    + .enable = pwm_mediatek_enable,
    + .disable = pwm_mediatek_disable,
    .owner = THIS_MODULE,
    };

    -static int mtk_pwm_probe(struct platform_device *pdev)
    +static int pwm_mediatek_probe(struct platform_device *pdev)
    {
    struct device_node *np = pdev->dev.of_node;
    - struct mtk_pwm_chip *pc;
    + struct pwm_mediatek_chip *pc;
    struct resource *res;
    unsigned int npwms;
    int ret;
    @@ -293,7 +295,7 @@ static int mtk_pwm_probe(struct platform_device *pdev)
    platform_set_drvdata(pdev, pc);

    pc->chip.dev = &pdev->dev;
    - pc->chip.ops = &mtk_pwm_ops;
    + pc->chip.ops = &pwm_mediatek_ops;
    pc->chip.base = -1;
    pc->chip.npwm = npwms;

    @@ -306,55 +308,55 @@ static int mtk_pwm_probe(struct platform_device *pdev)
    return 0;
    }

    -static int mtk_pwm_remove(struct platform_device *pdev)
    +static int pwm_mediatek_remove(struct platform_device *pdev)
    {
    - struct mtk_pwm_chip *pc = platform_get_drvdata(pdev);
    + struct pwm_mediatek_chip *pc = platform_get_drvdata(pdev);

    return pwmchip_remove(&pc->chip);
    }

    -static const struct mtk_pwm_platform_data mt2712_pwm_data = {
    +static const struct pwm_mediatek_of_data mt2712_pwm_data = {
    .fallback_npwms = 8,
    .pwm45_fixup = false,
    .has_clks = true,
    };

    -static const struct mtk_pwm_platform_data mt7622_pwm_data = {
    +static const struct pwm_mediatek_of_data mt7622_pwm_data = {
    .fallback_npwms = 6,
    .pwm45_fixup = false,
    .has_clks = true,
    };

    -static const struct mtk_pwm_platform_data mt7623_pwm_data = {
    +static const struct pwm_mediatek_of_data mt7623_pwm_data = {
    .fallback_npwms = 5,
    .pwm45_fixup = true,
    .has_clks = true,
    };

    -static const struct mtk_pwm_platform_data mt7628_pwm_data = {
    +static const struct pwm_mediatek_of_data mt7628_pwm_data = {
    .fallback_npwms = 4,
    .pwm45_fixup = true,
    .has_clks = false,
    };

    -static const struct of_device_id mtk_pwm_of_match[] = {
    +static const struct of_device_id pwm_mediatek_of_match[] = {
    { .compatible = "mediatek,mt2712-pwm", .data = &mt2712_pwm_data },
    { .compatible = "mediatek,mt7622-pwm", .data = &mt7622_pwm_data },
    { .compatible = "mediatek,mt7623-pwm", .data = &mt7623_pwm_data },
    { .compatible = "mediatek,mt7628-pwm", .data = &mt7628_pwm_data },
    { },
    };
    -MODULE_DEVICE_TABLE(of, mtk_pwm_of_match);
    +MODULE_DEVICE_TABLE(of, pwm_mediatek_of_match);

    -static struct platform_driver mtk_pwm_driver = {
    +static struct platform_driver pwm_mediatek_driver = {
    .driver = {
    - .name = "mtk-pwm",
    - .of_match_table = mtk_pwm_of_match,
    + .name = "pwm-mediatek",
    + .of_match_table = pwm_mediatek_of_match,
    },
    - .probe = mtk_pwm_probe,
    - .remove = mtk_pwm_remove,
    + .probe = pwm_mediatek_probe,
    + .remove = pwm_mediatek_remove,
    };
    -module_platform_driver(mtk_pwm_driver);
    +module_platform_driver(pwm_mediatek_driver);

    MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
    MODULE_LICENSE("GPL");
    --
    2.17.1
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      Last update: 2019-08-22 09:02    [W:4.070 / U:0.016 seconds]
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