Messages in this thread Patch in this message | | | Date | Wed, 21 Aug 2019 15:16:31 +0200 (CEST) | From | Thomas Gleixner <> | Subject | Re: [PATCH] x86/apic: Update virtual irq base for DT/OF based system as well |
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On Wed, 21 Aug 2019, Andy Shevchenko wrote: > On Wed, Aug 21, 2019 at 01:20:53PM +0200, Thomas Gleixner wrote: > > But x86 implements arch_dynirq_lower_bound() which overrides the core limit > > and because ioapic_dynirq_base is zero in the DT case it allows VIRQ 0 to > > be allocated which then causes of_irq*() to fail. > > > > So your change prevents that by excluding the 'GSI' range from allocation, > > which means that the first irq number which is handed out is 24, assumed > > you have one IOAPIC with 24 pins. > > I have tested this on the ACPI-based system where we have 55 lines of IOAPIC, > no PIC, and some GPIO lines. Overall I see that nr_irqs is 512 and shifting > by 55 freezes 10% of the space for nothing. Luckily we have SPARSE_IRQS > selected for any X86, so, it wouldn't waste memory. > > I think we may do slightly better if we just limit the change to the certain > cases.
For DT we can actually avoid that completely. See below.
For ACPI not unfortunately as the stupid GSI mapping is hard coded.
Thanks,
tglx
8<------------- --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c @@ -2438,7 +2438,13 @@ unsigned int arch_dynirq_lower_bound(uns * dmar_alloc_hwirq() may be called before setup_IO_APIC(), so use * gsi_top if ioapic_dynirq_base hasn't been initialized yet. */ - return ioapic_initialized ? ioapic_dynirq_base : gsi_top; + if (!ioapic_initialized) + return gsi_top; + /* + * For DT enabled machines ioapic_dynirq_base is irrelevant and not + * updated. So simply return @from if ioapic_dynirq_base == 0. + */ + return ioapic_dynirq_base ? : from; } #ifdef CONFIG_X86_32
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