Messages in this thread | | | From | Stefan-gabriel Mirea <> | Subject | Re: [PATCH v2 3/6] arm64: dts: fsl: Add device tree for S32V234-EVB | Date | Tue, 20 Aug 2019 16:38:34 +0000 |
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Hello Shawn,
Thank you for your suggestions!
On 8/19/2019 11:58 AM, Shawn Guo wrote: > On Fri, Aug 09, 2019 at 11:29:12AM +0000, Stefan-gabriel Mirea wrote: >> .../boot/dts/freescale/fsl-s32v234-evb.dts | 24 ++++ > > The 'fsl-' prefix can be saved here, so that we can distinguish three > families by starting string: imx??? for i.MX, fsl-??? for LayerScape, > and s32??? for S32.
All right, I will remove the prefixes.
>> + model = "Freescale S32V234"; > > The 'model' is usually used in board level DTS to describe the board.
I will delete the 'model' property from fsl-s32v234.dtsi and add a suitable one in fsl-s32v234-evb.dts.
>> + }; > > Please have a newline between nodes. > >> + cpu1: cpu@1 {
I've got it.
>> + interrupts = <0 59 1>; > > Please use GIC_SPI and IRQ_TYPE_xxx defines to make it more readable.
I will use GIC_SPI/GIC_PPI and IRQ_TYPE_xxx/GIC_CPU_MASK_xxx where applicable.
>> + >> + timer { >> + compatible = "arm,armv8-timer"; >> + interrupts = <1 13 0xf08>, >> + <1 14 0xf08>, >> + <1 11 0xf08>, >> + <1 10 0xf08>; >> + /* clock-frequency might be modified by u-boot, depending on the >> + * chip version. >> + */ >> + clock-frequency = <10000000>; >> + }; >> + >> + gic: interrupt-controller@7d001000 { >> + compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; >> + #interrupt-cells = <3>; >> + #address-cells = <0>; >> + interrupt-controller; >> + reg = <0 0x7d001000 0 0x1000>, >> + <0 0x7d002000 0 0x2000>, >> + <0 0x7d004000 0 0x2000>, >> + <0 0x7d006000 0 0x2000>; >> + interrupts = <1 9 0xf04>; >> + }; > > We usually put these core platform devices prior to 'soc' node.
Sure, I will move the 'timer' and 'interrupt-controller' nodes right before 'soc'.
Regards, Stefan
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