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SubjectRe: [v1 2/3] dt/bindings: clk: Add DT bindings for LS1028A Display output interface
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Quoting Wen He (2019-08-12 03:02:16)
> diff --git a/Documentation/devicetree/bindings/clock/fsl,plldig.txt b/Documentation/devicetree/bindings/clock/fsl,plldig.txt
> new file mode 100644
> index 000000000000..29c5a6117809
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/fsl,plldig.txt
> @@ -0,0 +1,26 @@
> +NXP QorIQ Layerscape LS1028A Display output interface Clock
> +===========================================================

Can you convert this to YAML?

> +
> +Required properties:
> + - compatible: shall contain "fsl,ls1028a-plldig"
> + - reg: Physical base address and size of the block registers
> + - #clock-cells: shall contain 1.

As I said in the previous patch, this should probably be 0. Also, please
order this before the driver in the patch series and thread your
messages please. If you use git-send-email this is done for you pretty
easily.

> + - clocks: a phandle + clock-specifier pairs, here should be
> + specify the reference clock of the system
> +
> +

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