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SubjectRe: [PATCH 16/17] riscv: clear the instruction cache and all registers when booting
On Mon, Jul 08, 2019 at 01:26:33AM -0700, Palmer Dabbelt wrote:
>>> + csrs sstatus, t1
> You need to check that the write stuck and branch around the FP instructions.
> Specifically, CONFIG_FPU means there may be an FPU, not there's definately an
> FPU. You should also turn the FPU back off after zeroing the state.

Well, that is why we check the hwcaps from misa just above and skip
this fp reg clearing if it doesn't contain the 'F' or 'D' extension.

The caller disables the FPU a few instructions later:

* Disable FPU to detect illegal usage of
* floating point in kernel space
li t0, SR_FS
csrc CSR_XSTATUS, t0

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