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    SubjectRe: [RFC PATCH 00/16] KVM RISC-V Support
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    On 30/07/19 15:50, Anup Patel wrote:
    >> BTW, since IPIs are handled in the SBI I wouldn't bother with in-kernel
    >> PLIC emulation unless you can demonstrate performance improvements (for
    >> example due to irqfd). In fact, it may be more interesting to add
    >
    > I thought VHOST requires irqfd and we would certainly endup providing
    > in-kernel PLIC emulation to support VHOST.

    vhost only needs an eventfd, userspace can poll the eventfd and inject
    the irq as usual with KVM_INTERRUPT. Of course that can be slower, but
    you can benchmark it and see if it's indeed a good reason for in-kernel
    PLIC.

    >> plumbing for userspace handling of selected SBI calls (in addition to
    >> get/putchar, sbi_system_reset and sbi_hart_down look like good
    >> candidates in SBI v0.2).
    >
    > The get/putchar SBI v0.1 calls won't be encouraged going forward because
    > we already have earlycon implmentation in-place and Guest kernel can directly
    > write to UART registers for earlyprints.

    > If we still wanted to implement get/putchar calls then we would need a RISC-V
    > specific exit reason in KVM. We have tried to avoid RISC-V specific IOCTLs
    > or exit reason in this series.

    Sounds good.

    Paolo

    >>
    >>> We were thinking to keep KVM RISC-V disabled by default (i.e. keep it
    >>> experimental) until we have validated it on some FPGA or real HW. For now,
    >>> users can explicitly enable it and play-around on QEMU emulation. I hope
    >>> this is fine with most people ?
    >>
    >> That's certainly okay with me.
    >>
    >
    > Thanks,
    > Anup
    >

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