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SubjectRe: [PATCH] ARM: check stmfd instruction using right shift
On Tue, Jul 30, 2019 at 03:18:31PM +0800, Chunyan Zhang wrote:
> Gentle ping
>
> probably this patch was missed or entered into spam?

Please submit it to the patch system, thanks.

>
> On Mon, 22 Jul 2019 at 15:14, Chunyan Zhang <zhang.lyra@gmail.com> wrote:
> >
> > From: Lvqiang Huang <Lvqiang.Huang@unisoc.com>
> >
> > In the commit ef41b5c92498 ("ARM: make kernel oops easier to read"),
> > - .word 0xe92d0000 >> 10 @ stmfd sp!, {}
> > + .word 0xe92d0000 >> 11 @ stmfd sp!, {}
> > then the shift need to change to 11.
> >
> > Fixes: ef41b5c92498 ("ARM: make kernel oops easier to read")
> > Signed-off-by: Lvqiang Huang <Lvqiang.Huang@unisoc.com>
> > Signed-off-by: Chunyan Zhang <zhang.lyra@gmail.com>
> > ---
> > arch/arm/lib/backtrace.S | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/lib/backtrace.S b/arch/arm/lib/backtrace.S
> > index 7d7952e..926851b 100644
> > --- a/arch/arm/lib/backtrace.S
> > +++ b/arch/arm/lib/backtrace.S
> > @@ -70,7 +70,7 @@ for_each_frame: tst frame, mask @ Check for address exceptions
> >
> > 1003: ldr r2, [sv_pc, #-4] @ if stmfd sp!, {args} exists,
> > ldr r3, .Ldsi+4 @ adjust saved 'pc' back one
> > - teq r3, r2, lsr #10 @ instruction
> > + teq r3, r2, lsr #11 @ instruction
> > subne r0, sv_pc, #4 @ allow for mov
> > subeq r0, sv_pc, #8 @ allow for mov + stmia
> >
> > --
> > 1.7.9.5
> >
>

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