lkml.org 
[lkml]   [2019]   [Jul]   [26]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
Patch in this message
/
From
Subject[PATCH 3/6] pwm: sun4i: Add a quirk for bus clock
Date
H6 PWM core needs bus clock to be enabled in order to work.

Add a quirk for it.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
drivers/pwm/pwm-sun4i.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)

diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c
index 1b7be8fbde86..7d3ac3f2dc3f 100644
--- a/drivers/pwm/pwm-sun4i.c
+++ b/drivers/pwm/pwm-sun4i.c
@@ -72,6 +72,7 @@ static const u32 prescaler_table[] = {
};

struct sun4i_pwm_data {
+ bool has_bus_clock;
bool has_prescaler_bypass;
bool has_reset;
unsigned int npwm;
@@ -79,6 +80,7 @@ struct sun4i_pwm_data {

struct sun4i_pwm_chip {
struct pwm_chip chip;
+ struct clk *bus_clk;
struct clk *clk;
struct reset_control *rst;
void __iomem *base;
@@ -382,6 +384,16 @@ static int sun4i_pwm_probe(struct platform_device *pdev)
reset_control_deassert(pwm->rst);
}

+ if (pwm->data->has_bus_clock) {
+ pwm->bus_clk = devm_clk_get(&pdev->dev, "bus");
+ if (IS_ERR(pwm->bus_clk)) {
+ ret = PTR_ERR(pwm->bus_clk);
+ goto err_bus;
+ }
+
+ clk_prepare_enable(pwm->bus_clk);
+ }
+
pwm->chip.dev = &pdev->dev;
pwm->chip.ops = &sun4i_pwm_ops;
pwm->chip.base = -1;
@@ -402,6 +414,8 @@ static int sun4i_pwm_probe(struct platform_device *pdev)
return 0;

err_pwm_add:
+ clk_disable_unprepare(pwm->bus_clk);
+err_bus:
reset_control_assert(pwm->rst);

return ret;
@@ -416,6 +430,7 @@ static int sun4i_pwm_remove(struct platform_device *pdev)
if (ret)
return ret;

+ clk_disable_unprepare(pwm->bus_clk);
reset_control_assert(pwm->rst);

return 0;
--
2.22.0
\
 
 \ /
  Last update: 2019-07-26 20:41    [W:0.217 / U:0.552 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site