lkml.org 
[lkml]   [2019]   [Jul]   [24]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH 5.1 051/371] crypto: talitos - Align SEC1 accesses to 32 bits boundaries.
    Date
    [ Upstream commit c9cca7034b34a2d82e9a03b757de2485c294851c ]

    The MPC885 reference manual states:

    SEC Lite-initiated 8xx writes can occur only on 32-bit-word boundaries, but
    reads can occur on any byte boundary. Writing back a header read from a
    non-32-bit-word boundary will yield unpredictable results.

    In order to ensure that, cra_alignmask is set to 3 for SEC1.

    Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
    Fixes: 9c4a79653b35 ("crypto: talitos - Freescale integrated security engine (SEC) driver")
    Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/crypto/talitos.c | 5 ++++-
    1 file changed, 4 insertions(+), 1 deletion(-)

    diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c
    index 657cf739ee40..82d3625667cd 100644
    --- a/drivers/crypto/talitos.c
    +++ b/drivers/crypto/talitos.c
    @@ -3192,7 +3192,10 @@ static struct talitos_crypto_alg *talitos_alg_alloc(struct device *dev,
    alg->cra_priority = t_alg->algt.priority;
    else
    alg->cra_priority = TALITOS_CRA_PRIORITY;
    - alg->cra_alignmask = 0;
    + if (has_ftr_sec1(priv))
    + alg->cra_alignmask = 3;
    + else
    + alg->cra_alignmask = 0;
    alg->cra_ctxsize = sizeof(struct talitos_ctx);
    alg->cra_flags |= CRYPTO_ALG_KERN_DRIVER_ONLY;

    --
    2.20.1


    \
     
     \ /
      Last update: 2019-07-24 22:22    [W:4.130 / U:0.112 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site