Messages in this thread | | | Subject | Re: [PATCH] clk: renesas: cpg-mssr: Fix reset control race condition | From | Stephen Boyd <> | Date | Mon, 22 Jul 2019 15:05:13 -0700 |
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Quoting Geert Uytterhoeven (2019-07-11 06:03:59) > The module reset code in the Renesas CPG/MSSR driver uses > read-modify-write (RMW) operations to write to a Software Reset Register > (SRCRn), and simple writes to write to a Software Reset Clearing > Register (SRSTCLRn), as was mandated by the R-Car Gen2 and Gen3 Hardware > User's Manuals. > > However, this may cause a race condition when two devices are reset in > parallel: if the reset for device A completes in the middle of the RMW > operation for device B, device A may be reset again, causing subtle > failures (e.g. i2c timeouts): > > thread A thread B > -------- --------
Applied to clk-fixes
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