Messages in this thread Patch in this message | | | From | Alistair Francis <> | Subject | [PATCH 2/2] riscv/include/uapi: Define a custom __SIGINFO struct for RV32 | Date | Tue, 2 Jul 2019 17:18:42 -0700 |
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The glibc implementation of siginfo_t results in an allignment of 8 bytes for the union _sifields on RV32. The kernel has an allignment of 4 bytes for the _sifields union. This results in information being lost when glibc parses the siginfo_t struct.
To fix the issue add a pad variable to the struct to avoid allignment mismatches.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> --- arch/riscv/include/uapi/asm/siginfo.h | 32 +++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 arch/riscv/include/uapi/asm/siginfo.h
diff --git a/arch/riscv/include/uapi/asm/siginfo.h b/arch/riscv/include/uapi/asm/siginfo.h new file mode 100644 index 000000000000..0854ad97bf44 --- /dev/null +++ b/arch/riscv/include/uapi/asm/siginfo.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +#ifndef _ASM_RISCV_SIGINFO_H +#define _ASM_RISCV_SIGINFO_H + +/* Add a pad element for RISC-V 32-bit. We need this as the + * _sifields union is 8 byte allgined in usperace. + */ +#if __riscv_xlen == 32 +#ifndef __ARCH_HAS_SWAPPED_SIGINFO +#define __SIGINFO \ +struct { \ + int si_signo; \ + int si_errno; \ + int si_code; \ + int pad; \ + union __sifields _sifields; \ +} +#else +#define __SIGINFO \ +struct { \ + int si_signo; \ + int si_code; \ + int si_errno; \ + int pad; \ + union __sifields _sifields; \ +} +#endif /* __ARCH_HAS_SWAPPED_SIGINFO */ +#endif + +#include <asm-generic/siginfo.h> + +#endif /* _ASM_RISCV_SIGINFO_H */ -- 2.22.0
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