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SubjectRe: [PATCH v8 3/5] mtd: Add support for HyperBus memory devices
Date
Hello!

On 06/25/2019 10:57 AM, Vignesh Raghavendra wrote:

> Cypress' HyperBus is Low Signal Count, High Performance Double Data Rate
> Bus interface between a host system master and one or more slave
> interfaces. HyperBus is used to connect microprocessor, microcontroller,
> or ASIC devices with random access NOR flash memory (called HyperFlash)
> or self refresh DRAM (called HyperRAM).
>
> Its a 8-bit data bus (DQ[7:0]) with Read-Write Data Strobe (RWDS)
> signal and either Single-ended clock(3.0V parts) or Differential clock
> (1.8V parts). It uses ChipSelect lines to select b/w multiple slaves.
> At bus level, it follows a separate protocol described in HyperBus
> specification[1].
>
> HyperFlash follows CFI AMD/Fujitsu Extended Command Set (0x0002) similar
> to that of existing parallel NORs. Since HyperBus is x8 DDR bus,
> its equivalent to x16 parallel NOR flash with respect to bits per clock
> cycle. But HyperBus operates at >166MHz frequencies.
> HyperRAM provides direct random read/write access to flash memory
> array.
>
> But, HyperBus memory controllers seem to abstract implementation details
> and expose a simple MMIO interface to access connected flash.
>
> Add support for registering HyperFlash devices with MTD framework. MTD
> maps framework along with CFI chip support framework are used to support
> communicating with flash.
>
> Framework is modelled along the lines of spi-nor framework. HyperBus
> memory controller (HBMC) drivers calls hyperbus_register_device() to
> register a single HyperFlash device. HyperFlash core parses MMIO access
> information from DT, sets up the map_info struct, probes CFI flash and
> registers it with MTD framework.
>
> Some HBMC masters need calibration/training sequence[3] to be carried
> out, in order for DLL inside the controller to lock, by reading a known
> string/pattern. This is done by repeatedly reading CFI Query
> Identification String. Calibration needs to be done before trying to detect
> flash as part of CFI flash probe.
>
> HyperRAM is not supported at the moment.
>
> HyperBus specification can be found at[1]
> HyperFlash datasheet can be found at[2]
>
> [1] https://www.cypress.com/file/213356/download
> [2] https://www.cypress.com/file/213346/download
> [3] http://www.ti.com/lit/ug/spruid7b/spruid7b.pdf
> Table 12-5741. HyperFlash Access Sequence
>
> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
[...]

I have at least created my HyperBus driver and unfortunately I'm having serious
issues with the design of the support core (see below)...

[...]
> diff --git a/drivers/mtd/hyperbus/hyperbus-core.c b/drivers/mtd/hyperbus/hyperbus-core.c
> new file mode 100644
> index 000000000000..63a9e64895bc
> --- /dev/null
> +++ b/drivers/mtd/hyperbus/hyperbus-core.c
> @@ -0,0 +1,154 @@
[...]
> +int hyperbus_register_device(struct hyperbus_device *hbdev)
> +{
> + const struct hyperbus_ops *ops;
> + struct hyperbus_ctlr *ctlr;
> + struct device_node *np;
> + struct map_info *map;
> + struct resource res;
> + struct device *dev;
> + int ret;
> +
> + if (!hbdev || !hbdev->np || !hbdev->ctlr || !hbdev->ctlr->dev) {
> + pr_err("hyperbus: please fill all the necessary fields!\n");
> + return -EINVAL;
> + }
> +
> + np = hbdev->np;
> + ctlr = hbdev->ctlr;
> + if (!of_device_is_compatible(np, "cypress,hyperflash"))
> + return -ENODEV;
> +
> + hbdev->memtype = HYPERFLASH;
> +
> + ret = of_address_to_resource(np, 0, &res);

Hm, I doubt that the HB devices are wholly mapped into memory space, that seems
like a property of the HB controller. In my case, the flash device in the DT has
only single-cell "reg" prop (equal to the chip select #). Then this function returns
-EINVAL and the registration fails. Also, in my case such mapping is R/O, not R/W.

> + if (ret)
> + return ret;
> +
> + dev = ctlr->dev;
> + map = &hbdev->map;
> + map->size = resource_size(&res);
> + map->virt = devm_ioremap_resource(dev, &res);
> + if (IS_ERR(map->virt))
> + return PTR_ERR(map->virt);

Again, I doubt that this should be done here, and not in the HB controller driver...

[...]

MBR, Sergei

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