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Subject[PATCH] x86: Add irq spillover warning
On Intel hardware, cpus are limited in the number of irqs they can
have affined to them (currently 240), based on section 10.5.2 of:

If a cpu has more than this number of interrupts affined to it, they
will spill over to other cpus, which potentially may be outside of their
affinity mask. Given that this might cause unexpected behavior on
performance sensitive systems, warn the user should this condition occur
so that corrective action can be taken

Signed-off-by: Neil Horman <>
CC: Thomas Gleixner <>
CC: Ingo Molnar <>
CC: Borislav Petkov <>
CC: "H. Peter Anvin" <>
arch/x86/kernel/irq.c | 8 ++++++++
1 file changed, 8 insertions(+)

diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index 9b68b5b00ac9..ac7ed32de3d5 100644
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -244,6 +244,14 @@ __visible unsigned int __irq_entry do_IRQ(struct pt_regs *regs)

desc = __this_cpu_read(vector_irq[vector]);

+ /*
+ * Intel processors are limited in the number of irqs they can address. If we affine
+ * too many irqs to a given cpu, they can silently spill to another cpu outside of
+ * their affinity mask. Warn the user when this occurs
+ */
+ if (unlikely(!cpumask_test_cpu(smp_processor_id(), &desc->irq_common_data.affinity)))
+ pr_emerg_ratelimited("%s: %d.%d handled outside of affinity mask\n");
if (!handle_irq(desc, regs)) {

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