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SubjectRe: [PATCH] vsyscall: use __iter_div_u64_rem()
On Thu, Jul 11, 2019 at 7:14 PM 'Nick Desaulniers' via Clang Built
Linux <> wrote:
> On Thu, Jul 11, 2019 at 5:28 AM Arnd Bergmann <> wrote:
> > clang does not like an inline assembly with a "=q" contraint for
> > a 64-bit output:
> Seems like starting in GCC 7, GCC may not like it either:
> it simply warns then proceeds with code gen. Another difference may
> come from when GCC vs Clang perform dead code elimination (DCE) vs
> semantic analysis.

Right, I also had the idea to work around it with a set of
instead of the switch()/case but did not complete that patch as the percpu
code is rather complex and this would touch lots of code.


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