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SubjectRe: [PATCH v7 05/27] x86/fpu/xstate: Add XSAVES system states for shadow stack
On Thu, Jun 06, 2019 at 01:06:24PM -0700, Yu-cheng Yu wrote:
> Intel Control-flow Enforcement Technology (CET) introduces the
> following MSRs.
>
> MSR_IA32_U_CET (user-mode CET settings),
> MSR_IA32_PL3_SSP (user-mode shadow stack),
> MSR_IA32_PL0_SSP (kernel-mode shadow stack),
> MSR_IA32_PL1_SSP (Privilege Level 1 shadow stack),
> MSR_IA32_PL2_SSP (Privilege Level 2 shadow stack).
>
> Introduce them into XSAVES system states.
>
> Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com>
> ---
> arch/x86/include/asm/fpu/types.h | 22 +++++++++++++++++++++
> arch/x86/include/asm/fpu/xstate.h | 4 +++-
> arch/x86/include/uapi/asm/processor-flags.h | 2 ++
> arch/x86/kernel/fpu/xstate.c | 10 ++++++++++
> 4 files changed, 37 insertions(+), 1 deletion(-)

And yet, no changes to msr-index.h !?

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