lkml.org 
[lkml]   [2019]   [Jun]   [6]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
SubjectRe: [PATCH] KVM: x86: move MSR_IA32_POWER_CTL handling to common code
From
Date

> On 6 Jun 2019, at 15:33, Paolo Bonzini <pbonzini@redhat.com> wrote:
>
> Make it available to AMD hosts as well, just in case someone is trying
> to use an Intel processor's CPUID setup.

I’m actually quite surprised that such a setup works properly.

>
> Suggested-by: Sean Christopherson <sean.j.christopherson@intel.com>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

Reviewed-by: Liran Alon <liran.alon@oracle.com>

> ---
> arch/x86/include/asm/kvm_host.h | 1 +
> arch/x86/kvm/vmx/vmx.c | 6 ------
> arch/x86/kvm/vmx/vmx.h | 2 --
> arch/x86/kvm/x86.c | 6 ++++++
> 4 files changed, 7 insertions(+), 8 deletions(-)
>
> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> index a86026969b19..35e7937cc9ac 100644
> --- a/arch/x86/include/asm/kvm_host.h
> +++ b/arch/x86/include/asm/kvm_host.h
> @@ -689,6 +689,7 @@ struct kvm_vcpu_arch {
> u32 virtual_tsc_mult;
> u32 virtual_tsc_khz;
> s64 ia32_tsc_adjust_msr;
> + u64 msr_ia32_power_ctl;
> u64 tsc_scaling_ratio;
>
> atomic_t nmi_queued; /* unprocessed asynchronous NMIs */
> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
> index cccf73a91e88..5d903f8909d1 100644
> --- a/arch/x86/kvm/vmx/vmx.c
> +++ b/arch/x86/kvm/vmx/vmx.c
> @@ -1695,9 +1695,6 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> case MSR_IA32_SYSENTER_ESP:
> msr_info->data = vmcs_readl(GUEST_SYSENTER_ESP);
> break;
> - case MSR_IA32_POWER_CTL:
> - msr_info->data = vmx->msr_ia32_power_ctl;
> - break;
> case MSR_IA32_BNDCFGS:
> if (!kvm_mpx_supported() ||
> (!msr_info->host_initiated &&
> @@ -1828,9 +1825,6 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> case MSR_IA32_SYSENTER_ESP:
> vmcs_writel(GUEST_SYSENTER_ESP, data);
> break;
> - case MSR_IA32_POWER_CTL:
> - vmx->msr_ia32_power_ctl = data;
> - break;
> case MSR_IA32_BNDCFGS:
> if (!kvm_mpx_supported() ||
> (!msr_info->host_initiated &&
> diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h
> index 61128b48c503..1cdaa5af8245 100644
> --- a/arch/x86/kvm/vmx/vmx.h
> +++ b/arch/x86/kvm/vmx/vmx.h
> @@ -260,8 +260,6 @@ struct vcpu_vmx {
>
> unsigned long host_debugctlmsr;
>
> - u64 msr_ia32_power_ctl;
> -
> /*
> * Only bits masked by msr_ia32_feature_control_valid_bits can be set in
> * msr_ia32_feature_control. FEATURE_CONTROL_LOCKED is always included
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 145df9778ed0..5ec87ded17db 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -2563,6 +2563,9 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> return 1;
> vcpu->arch.smbase = data;
> break;
> + case MSR_IA32_POWER_CTL:
> + vcpu->arch.msr_ia32_power_ctl = data;
> + break;
> case MSR_IA32_TSC:
> kvm_write_tsc(vcpu, msr_info);
> break;
> @@ -2822,6 +2825,9 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> return 1;
> msr_info->data = vcpu->arch.arch_capabilities;
> break;
> + case MSR_IA32_POWER_CTL:
> + msr_info->data = vcpu->arch.msr_ia32_power_ctl;
> + break;
> case MSR_IA32_TSC:
> msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset;
> break;
> --
> 1.8.3.1
>

\
 
 \ /
  Last update: 2019-06-06 14:37    [W:0.040 / U:0.384 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site