lkml.org 
[lkml]   [2019]   [Jun]   [6]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
SubjectRe: [PATCH v3, 06/27] drm/mediatek: add mutex mod into ddp private data
From
Date
Hi, Yongqiang:

On Wed, 2019-06-05 at 19:42 +0800, yongqiang.niu@mediatek.com wrote:
> From: Yongqiang Niu <yongqiang.niu@mediatek.com>
>
> except mutex mod, mutex mod reg,mutex sof reg,
> and mutex sof id will be ddp private data
>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 53 +++++++++++++++++++++++-----------
> 1 file changed, 36 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> index 579ce28..ae94d44 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> @@ -41,12 +41,12 @@
> #define DISP_REG_CONFIG_DSI_SEL 0x050
> #define DISP_REG_CONFIG_DPI_SEL 0x064
>
> -#define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 * (n))
> -#define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n))
> -#define DISP_REG_MUTEX_RST(n) (0x28 + 0x20 * (n))
> -#define DISP_REG_MUTEX_MOD(n) (0x2c + 0x20 * (n))
> -#define DISP_REG_MUTEX_SOF(n) (0x30 + 0x20 * (n))
> -#define DISP_REG_MUTEX_MOD2(n) (0x34 + 0x20 * (n))
> +#define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 * (n))
> +#define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n))
> +#define DISP_REG_MUTEX_RST(n) (0x28 + 0x20 * (n))
> +#define DISP_REG_MUTEX_MOD(n) (0x2c + 0x20 * (n))
> +#define DISP_REG_MUTEX_SOF(n) (0x30 + 0x20 * (n))
> +#define DISP_REG_MUTEX_MOD2(n) (0x34 + 0x20 * (n))

You add 'tab' because of "add mutex mod register offset into ddp private
data" not "add mutex mod into ddp private data", so move this to the
related patch.

Regards,
CK

>
> #define INT_MUTEX BIT(1)
>
> @@ -147,12 +147,16 @@ struct mtk_disp_mutex {
> bool claimed;
> };
>
> +struct mtk_ddp_data {
> + const unsigned int *mutex_mod;
> +};
> +
> struct mtk_ddp {
> struct device *dev;
> struct clk *clk;
> void __iomem *regs;
> struct mtk_disp_mutex mutex[10];
> - const unsigned int *mutex_mod;
> + const struct mtk_ddp_data *data;
> };
>
> static const unsigned int mt2701_mutex_mod[DDP_COMPONENT_ID_MAX] = {
> @@ -202,6 +206,18 @@ struct mtk_ddp {
> [DDP_COMPONENT_WDMA1] = MT8173_MUTEX_MOD_DISP_WDMA1,
> };
>
> +static const struct mtk_ddp_data mt2701_ddp_driver_data = {
> + .mutex_mod = mt2701_mutex_mod,
> +};
> +
> +static const struct mtk_ddp_data mt2712_ddp_driver_data = {
> + .mutex_mod = mt2712_mutex_mod,
> +};
> +
> +static const struct mtk_ddp_data mt8173_ddp_driver_data = {
> + .mutex_mod = mt8173_mutex_mod,
> +};
> +
> static unsigned int mtk_ddp_mout_en(enum mtk_ddp_comp_id cur,
> enum mtk_ddp_comp_id next,
> unsigned int *addr)
> @@ -464,15 +480,15 @@ void mtk_disp_mutex_add_comp(struct mtk_disp_mutex *mutex,
> reg = MUTEX_SOF_DPI1;
> break;
> default:
> - if (ddp->mutex_mod[id] < 32) {
> + if (ddp->data->mutex_mod[id] < 32) {
> offset = DISP_REG_MUTEX_MOD(mutex->id);
> reg = readl_relaxed(ddp->regs + offset);
> - reg |= 1 << ddp->mutex_mod[id];
> + reg |= 1 << ddp->data->mutex_mod[id];
> writel_relaxed(reg, ddp->regs + offset);
> } else {
> offset = DISP_REG_MUTEX_MOD2(mutex->id);
> reg = readl_relaxed(ddp->regs + offset);
> - reg |= 1 << (ddp->mutex_mod[id] - 32);
> + reg |= 1 << (ddp->data->mutex_mod[id] - 32);
> writel_relaxed(reg, ddp->regs + offset);
> }
> return;
> @@ -502,15 +518,15 @@ void mtk_disp_mutex_remove_comp(struct mtk_disp_mutex *mutex,
> ddp->regs + DISP_REG_MUTEX_SOF(mutex->id));
> break;
> default:
> - if (ddp->mutex_mod[id] < 32) {
> + if (ddp->data->mutex_mod[id] < 32) {
> offset = DISP_REG_MUTEX_MOD(mutex->id);
> reg = readl_relaxed(ddp->regs + offset);
> - reg &= ~(1 << ddp->mutex_mod[id]);
> + reg &= ~(1 << ddp->data->mutex_mod[id]);
> writel_relaxed(reg, ddp->regs + offset);
> } else {
> offset = DISP_REG_MUTEX_MOD2(mutex->id);
> reg = readl_relaxed(ddp->regs + offset);
> - reg &= ~(1 << (ddp->mutex_mod[id] - 32));
> + reg &= ~(1 << (ddp->data->mutex_mod[id] - 32));
> writel_relaxed(reg, ddp->regs + offset);
> }
> break;
> @@ -585,7 +601,7 @@ static int mtk_ddp_probe(struct platform_device *pdev)
> return PTR_ERR(ddp->regs);
> }
>
> - ddp->mutex_mod = of_device_get_match_data(dev);
> + ddp->data = of_device_get_match_data(dev);
>
> platform_set_drvdata(pdev, ddp);
>
> @@ -598,9 +614,12 @@ static int mtk_ddp_remove(struct platform_device *pdev)
> }
>
> static const struct of_device_id ddp_driver_dt_match[] = {
> - { .compatible = "mediatek,mt2701-disp-mutex", .data = mt2701_mutex_mod},
> - { .compatible = "mediatek,mt2712-disp-mutex", .data = mt2712_mutex_mod},
> - { .compatible = "mediatek,mt8173-disp-mutex", .data = mt8173_mutex_mod},
> + { .compatible = "mediatek,mt2701-disp-mutex",
> + .data = &mt2701_ddp_driver_data},
> + { .compatible = "mediatek,mt2712-disp-mutex",
> + .data = &mt2712_ddp_driver_data},
> + { .compatible = "mediatek,mt8173-disp-mutex",
> + .data = &mt8173_ddp_driver_data},
> {},
> };
> MODULE_DEVICE_TABLE(of, ddp_driver_dt_match);


\
 
 \ /
  Last update: 2019-06-06 07:43    [W:0.169 / U:2.472 seconds]
©2003-2018 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site