Messages in this thread | | | From | Rob Herring <> | Date | Wed, 26 Jun 2019 15:13:03 -0600 | Subject | Re: [PATCH] dt-bindings: riscv: resolve 'make dt_binding_check' warnings |
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On Wed, Jun 26, 2019 at 2:27 PM Paul Walmsley <paul.walmsley@sifive.com> wrote: > > On Wed, 26 Jun 2019, Rob Herring wrote: > > > On Wed, Jun 26, 2019 at 9:30 AM Paul Walmsley <paul.walmsley@sifive.com> wrote: > > > > > > Rob pointed out that one of the examples in the RISC-V 'cpus' YAML schema > > > results in warnings from 'make dt_binding_check'. Fix these. > > > > > > While here, make the whitespace in the second example consistent with the > > > first example. > > > > > > Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> > > > Cc: Rob Herring <robh@kernel.org> > > > --- > > > .../devicetree/bindings/riscv/cpus.yaml | 26 ++++++++++--------- > > > 1 file changed, 14 insertions(+), 12 deletions(-) > > > > > > diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml > > > index 27f02ec4bb45..f97a4ecd7b91 100644 > > > --- a/Documentation/devicetree/bindings/riscv/cpus.yaml > > > +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml > > > @@ -152,17 +152,19 @@ examples: > > > - | > > > // Example 2: Spike ISA Simulator with 1 Hart > > > cpus { > > > - cpu@0 { > > > - device_type = "cpu"; > > > - reg = <0>; > > > - compatible = "riscv"; > > > - riscv,isa = "rv64imafdc"; > > > - mmu-type = "riscv,sv48"; > > > - interrupt-controller { > > > - #interrupt-cells = <1>; > > > - interrupt-controller; > > > - compatible = "riscv,cpu-intc"; > > > - }; > > > - }; > > > + #address-cells = <1>; > > > + #size-cells = <0>; > > > + cpu@0 { > > > > This only works because you removed 'cpus' and therefore none of this > > schema is applied. > > I'm not following you - could you point out where "cpus" was removed?
Sorry, I guess the indentation change threw me off...
For fixing the dtc warnings:
Reviewed-by: Rob Herring <robh@kernel.org>
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