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SubjectRe: [PATCH] x86/mm: Handle physical-virtual alignment mismatch in phys_p4d_init()
On Mon, Jun 24, 2019 at 06:07:42PM +0800, Baoquan He wrote:
> On 06/21/19 at 01:54pm, Kirill A. Shutemov wrote:
> > > The code block as below is to zero p4d entries which are not coverred by
> > > the current memory range, and if haven't been mapped already. It's
> > > clearred away in this patch, could you also mention it in log, and tell
> > > why it doesn't matter now?
> > >
> > > If it doesn't matter, should we clear away the simillar code in
> > > phys_pud_init/phys_pmd_init/phys_pte_init? Maybe a prep patch to do the
> > > clean up?
> >
> > It only matters for the levels that contains page table entries that can
> > point to pages, not page tables. There's no p4d or pgd huge pages on x86.
> > Otherwise we only leak page tables without any benefit.
> Ah, I checked git history, didn't find why it's added. I just Have a
> superficial knowledge of the clearing, but in a low-efficiency way.
> >
> > We might have this on all leveles under p?d_large() condition and don't
> > touch page tables at all.
> I see.
> >
> > BTW, it all becomes rather risky for this late in the release cycle. Maybe
> > we should revert the original patch and try again later with more
> > comprehansive solution?
> It's not added in one time. I am fine with your current change, would be
> much better if mention it in log, and also add code comment above the
> clearing code. Surely reverting and trying later with more comprehensive
> solution is also good to me, this need a little more effort.

I've decided to keep the block for now. We can remove it later, once the fixis in.
I'll post it soon

Kirill A. Shutemov

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