[lkml]   [2019]   [Jun]   [24]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
SubjectRe: [PATCHv3 1/1] coresight: Do not default to CPU0 for missing CPU phandle
On 6/24/2019 1:56 PM, Suzuki K Poulose wrote:
> Sai,
> Thanks for getting this done.
> On 24/06/2019 04:36, Sai Prakash Ranjan wrote:
>> Coresight platform support assumes that a missing "cpu" phandle
>> defaults to CPU0. This could be problematic and unnecessarily binds
>> components to CPU0, where they may not be. Let us make the DT binding
>> rules a bit stricter by not defaulting to CPU0 for missing "cpu"
>> affinity information.
>> Also in coresight etm and cpu-debug drivers, abort the probe
>> for such cases.
>> Signed-off-by: Sai Prakash Ranjan <>
> Reviewed-by: Suzuki K Poulose <>

Thanks for the review Suzuki.

QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation

 \ /
  Last update: 2019-06-24 11:28    [W:0.058 / U:6.048 seconds]
©2003-2018 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site