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SubjectRe: [PATCHv3 1/1] coresight: Do not default to CPU0 for missing CPU phandle

Thanks for getting this done.

On 24/06/2019 04:36, Sai Prakash Ranjan wrote:
> Coresight platform support assumes that a missing "cpu" phandle
> defaults to CPU0. This could be problematic and unnecessarily binds
> components to CPU0, where they may not be. Let us make the DT binding
> rules a bit stricter by not defaulting to CPU0 for missing "cpu"
> affinity information.
> Also in coresight etm and cpu-debug drivers, abort the probe
> for such cases.
> Signed-off-by: Sai Prakash Ranjan <>

Reviewed-by: Suzuki K Poulose <>

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