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Subject[PATCH v13 12/13] MIPS: GCW0: Reduce system timer and clocksource to 750 kHz
Date
The default clock (12 MHz) is too fast for the system timer.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Mathieu Malaterre <malat@debian.org>
Tested-by: Artur Rojek <contact@artur-rojek.eu>
---

Notes:
v8: New patch

v9: Don't configure clock timer1, as the OS Timer is used as
clocksource on this SoC

v10: Revert back to v8 bahaviour. Let the user choose what
clocksource should be used.

v11: No change

v12: Move clocksource to channel 2, as channel 1 is used as PWM
for the backlight.

v13: No change

arch/mips/boot/dts/ingenic/gcw0.dts | 10 ++++++++++
1 file changed, 10 insertions(+)

diff --git a/arch/mips/boot/dts/ingenic/gcw0.dts b/arch/mips/boot/dts/ingenic/gcw0.dts
index 35f0291e8d38..f58d239c2058 100644
--- a/arch/mips/boot/dts/ingenic/gcw0.dts
+++ b/arch/mips/boot/dts/ingenic/gcw0.dts
@@ -2,6 +2,7 @@
/dts-v1/;

#include "jz4770.dtsi"
+#include <dt-bindings/clock/ingenic,tcu.h>

/ {
compatible = "gcw,zero", "ingenic,jz4770";
@@ -60,3 +61,12 @@
/* The WiFi module is connected to the UHC. */
status = "okay";
};
+
+&tcu {
+ /* 750 kHz for the system timer and clocksource */
+ assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER2>;
+ assigned-clock-rates = <750000>, <750000>;
+
+ /* PWM1 is in use, so reserve channel #2 for the clocksource */
+ ingenic,pwm-channels-mask = <0xfa>;
+};
--
2.21.0.593.g511ec345e18
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