Messages in this thread Patch in this message | | | From | Srinivas Kandagatla <> | Subject | [PATCH 5/6] nvmem: Broaden the selection of NVMEM_SNVS_LPGPR | Date | Fri, 14 Jun 2019 15:32:20 +0100 |
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From: Fabio Estevam <festevam@gmail.com>
The SNVS LPGR IP block is also found on other i.MX SoCs that are not covered by the current SOC_IMX6 || SOC_IMX7D logic.
One example is the i.MX7ULP.
To avoid keep expanding the SoC logic selection, make it broader by using the more generic ARCH_MXC symbol instead.
Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> --- drivers/nvmem/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig index 82a07c24e1db..96a8aedf1a9a 100644 --- a/drivers/nvmem/Kconfig +++ b/drivers/nvmem/Kconfig @@ -194,7 +194,7 @@ config MESON_MX_EFUSE config NVMEM_SNVS_LPGPR tristate "Support for Low Power General Purpose Register" - depends on SOC_IMX6 || SOC_IMX7D || COMPILE_TEST + depends on ARCH_MXC || COMPILE_TEST help This is a driver for Low Power General Purpose Register (LPGPR) available on i.MX6 and i.MX7 SoCs in Secure Non-Volatile Storage (SNVS) of this chip. -- 2.21.0
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