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SubjectRe: [PATCH v2 4/4] arm64: dts: meson: g12b: odroid-n2: add the Ethernet PHY reset line
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On 12/06/2019 22:55, Martin Blumenstingl wrote:
> The reset line of the RTL8211F PHY is routed to the GPIOZ_15 pad.
> Describe this in the device tree so the PHY framework can bring the PHY
> into a known state when initializing it. GPIOZ_15 doesn't support
> driving the output HIGH (to take the PHY out of reset, only output LOW
> to reset the PHY is supported). The datasheet states it's an "3.3V input
> tolerant open drain (OD) output pin". Instead there's a pull-up resistor
> on the board to take the PHY out of reset. The GPIO itself will be set
> to INPUT mode to take the PHY out of reset and LOW to reset the PHY,
> which is achieved with the flags (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN).
>
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> ---
> arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
> index 4146cd84989c..f911bbdc4e70 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
> @@ -186,6 +186,10 @@
> /* Realtek RTL8211F (0x001cc916) */
> reg = <0>;
> max-speed = <1000>;
> +
> + reset-assert-us = <10000>;
> + reset-deassert-us = <30000>;
> + reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
> };
> };
>
>

Thanks !

Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>

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