Messages in this thread | | | Subject | Re: [PATCH] powerpc: slightly improve cache helpers | From | Christophe Leroy <> | Date | Tue, 7 May 2019 18:53:30 +0200 |
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Le 07/05/2019 à 17:10, Segher Boessenkool a écrit : > Hi Christophe, > > On Tue, May 07, 2019 at 01:31:39PM +0000, Christophe Leroy wrote: >> Cache instructions (dcbz, dcbi, dcbf and dcbst) take two registers >> that are summed to obtain the target address. Using '%y0' argument >> gives GCC the opportunity to use both registers instead of only one >> with the second being forced to 0. > > That's not quite right. Sorry if I didn't explain it properly. > > "m" allows all memory. But this instruction only allows reg,reg and > 0,reg addressing. For that you need to use constraint "Z".
But gcc help (https://gcc.gnu.org/onlinedocs/gcc/Machine-Constraints.html#Machine-Constraints) says it is better to use 'm':
Z
Memory operand that is an indexed or indirect from a register (it is usually better to use ‘m’ or ‘es’ in asm statements)
That's the reason why I used 'm', I thought it was equivalent.
Christophe
> > The output modifier "%y0" just makes [reg] (i.e. simple indirect addressing) > print as "0,reg" instead of "0(reg)" as it would by default (for just "%0"). > > > Segher >
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