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Subject[PATCH v5 00/11] Support wakeup capable GPIOs
Date
Hi all,

This is a re-spin of the wakeup capable GPIO support for QCOM SoCs.
The earlier version of the patch revision 4, was published [1] and had
some good discussions. The comments from the review have also been
addressed and the code rebased on top of 5.1 in this spin. There a few
changes in this spin:
- Review comments from Stephen, Marc
- Bug fixes in irqdomain-map
- Fix invalid interrupt case
- Update documentation
- Attempt generalizing gpiochip_to_irq() for hierarchical domain

In patch v4, we were discussing about the IRQ type of GPIO defaulting to
IRQ_TYPE_NONE (as is was the custom for older implementation). In the
SDM845 SoC select GPIOs are routed to an always-on interrupt controller
called the PDC and then to the GIC.

Wakeup capabable:
GPIO ---> PDC ------> GIC

Requesting a GPIO as an interrupt through the gpio_to_irq() call would
setup an interrupt hierarchy as above and return the linux interrupt
number. However, since the trigger type of the GPIO is unknown at this
time, gpiolib defaults to IRQ_TYPE_NONE. This triggers a warning at the
GIC, which expects a valid trigger type be set correctly in the fwspec.
The solution to this problem is still at large and I would like to
solicit feedback on this.

Appreciate your time.

Thanks,
Lina

[1]. https://patchwork.kernel.org/cover/10851807/

Lina Iyer (9):
gpio: allow gpio_to_irq to use OF variants for gpiochips
irqdomain: add bus token DOMAIN_BUS_WAKEUP
of: irq: document properties for wakeup interrupt parent
drivers: irqchip: add PDC irqdomain for wakeup capable GPIOs
dt-bindings: sdm845-pinctrl: add wakeup interrupt parent for GPIO
drivers: pinctrl: msm: setup GPIO irqchip hierarchy
arm64: dts: qcom: add PDC interrupt controller for SDM845
arm64: defconfig: enable PDC interrupt controller for Qualcomm SDM845
arm64: dts: qcom: setup PDC as wakeup parent for GPIOs for SDM845

Stephen Boyd (1):
of: irq: add helper to remap interrupts to another irqdomain

Thierry Reding (1):
gpio: Add support for hierarchical IRQ domains

.../interrupt-controller/interrupts.txt | 54 +++++++
.../bindings/pinctrl/qcom,sdm845-pinctrl.txt | 79 +++++++++-
arch/arm64/boot/dts/qcom/sdm845.dtsi | 88 +++++++++++
arch/arm64/configs/defconfig | 1 +
drivers/gpio/gpiolib.c | 28 +++-
drivers/irqchip/qcom-pdc.c | 98 +++++++++++--
drivers/of/irq.c | 129 +++++++++++++++++
drivers/pinctrl/qcom/pinctrl-msm.c | 137 +++++++++++++++---
include/linux/gpio/driver.h | 6 +
include/linux/irqdomain.h | 1 +
include/linux/of_irq.h | 1 +
include/linux/soc/qcom/irq.h | 25 ++++
12 files changed, 610 insertions(+), 37 deletions(-)
create mode 100644 include/linux/soc/qcom/irq.h

--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

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