Messages in this thread | | | Date | Fri, 3 May 2019 06:12:32 -0600 | From | Keith Busch <> | Subject | Re: [PATCH 0/4] nvme-pci: support device coredump |
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On Fri, May 03, 2019 at 12:38:08PM +0900, Akinobu Mita wrote: > 2019年5月2日(木) 22:03 Keith Busch <keith.busch@intel.com>: > > On Thu, May 02, 2019 at 05:59:17PM +0900, Akinobu Mita wrote: > > > This enables to capture snapshot of controller information via device > > > coredump machanism, and it helps diagnose and debug issues. > > > > > > The nvme device coredump is triggered before resetting the controller > > > caused by I/O timeout, and creates the following coredump files. > > > > > > - regs: NVMe controller registers, including each I/O queue doorbell > > > registers, in nvme-show-regs style text format. > > > > You're supposed to treat queue doorbells as write-only. Spec says: > > > > The host should not read the doorbell registers. If a doorbell register > > is read, the value returned is vendor specific. > > OK. I'll exclude the doorbell registers from register dump. It will work > out without the information if we have snapshot of the queues.
Could you actually explain how the rest is useful? I personally have never encountered an issue where knowing these values would have helped: every device timeout always needed device specific internal firmware logs in my experience.
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