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    Subject[PATCH 5.1 012/405] mmc: sdhci-iproc: Set NO_HISPD bit to fix HS50 data hold time problem
    Date
    From: Trac Hoang <trac.hoang@broadcom.com>

    commit ec0970e0a1b2c807c908d459641a9f9a1be3e130 upstream.

    The iproc host eMMC/SD controller hold time does not meet the
    specification in the HS50 mode. This problem can be mitigated
    by disabling the HISPD bit; thus forcing the controller output
    data to be driven on the falling clock edges rather than the
    rising clock edges.

    Stable tag (v4.12+) chosen to assist stable kernel maintainers so that
    the change does not produce merge conflicts backporting to older kernel
    versions. In reality, the timing bug existed since the driver was first
    introduced but there is no need for this driver to be supported in kernel
    versions that old.

    Cc: stable@vger.kernel.org # v4.12+
    Signed-off-by: Trac Hoang <trac.hoang@broadcom.com>
    Signed-off-by: Scott Branden <scott.branden@broadcom.com>
    Acked-by: Adrian Hunter <adrian.hunter@intel.com>
    Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    drivers/mmc/host/sdhci-iproc.c | 3 ++-
    1 file changed, 2 insertions(+), 1 deletion(-)

    --- a/drivers/mmc/host/sdhci-iproc.c
    +++ b/drivers/mmc/host/sdhci-iproc.c
    @@ -220,7 +220,8 @@ static const struct sdhci_iproc_data ipr

    static const struct sdhci_pltfm_data sdhci_iproc_pltfm_data = {
    .quirks = SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
    - SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12,
    + SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 |
    + SDHCI_QUIRK_NO_HISPD_BIT,
    .quirks2 = SDHCI_QUIRK2_ACMD23_BROKEN,
    .ops = &sdhci_iproc_ops,
    };

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