Messages in this thread | | | From | "Liang, Kan" <> | Subject | Re: [PATCH 4/9] perf/x86/intel: Support hardware TopDown metrics | Date | Tue, 28 May 2019 14:24:38 -0400 |
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On 5/28/2019 9:43 AM, Peter Zijlstra wrote: > On Tue, May 21, 2019 at 02:40:50PM -0700, kan.liang@linux.intel.com wrote: >> @@ -3287,6 +3304,13 @@ static int core_pmu_hw_config(struct perf_event *event) >> return intel_pmu_bts_config(event); >> } >> >> +#define EVENT_CODE(e) (e->attr.config & INTEL_ARCH_EVENT_MASK) >> +#define is_slots_event(e) (EVENT_CODE(e) == 0x0400) >> +#define is_perf_metrics_event(e) \ >> + (((EVENT_CODE(e) & 0xff) == 0xff) && \ >> + (EVENT_CODE(e) >= 0x01ff) && \ >> + (EVENT_CODE(e) <= 0x04ff)) >> + > > That is horrific.. (e & INTEL_ARCH_EVENT_MASK) & 0xff is just daft, > that should be: (e & ARCH_PERFMON_EVENTSEL_EVENT). > > Also, we already have fake events for event=0, see FIXED2, why are we > now using event=0xff ?
I think event=0 is for genuine fixed events. Metrics events are fake events. I didn't find FIXED2 in the code. Could you please share more hints?
Thanks, Kan
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