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    Subject[PATCH 4.4 149/266] iommu/amd: Set exclusion range correctly
    Date
    [ Upstream commit 3c677d206210f53a4be972211066c0f1cd47fe12 ]

    The exlcusion range limit register needs to contain the
    base-address of the last page that is part of the range, as
    bits 0-11 of this register are treated as 0xfff by the
    hardware for comparisons.

    So correctly set the exclusion range in the hardware to the
    last page which is _in_ the range.

    Fixes: b2026aa2dce44 ('x86, AMD IOMMU: add functions for programming IOMMU MMIO space')
    Signed-off-by: Joerg Roedel <jroedel@suse.de>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/iommu/amd_iommu_init.c | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c
    index 94f1bf772ec93..db85cc5791dce 100644
    --- a/drivers/iommu/amd_iommu_init.c
    +++ b/drivers/iommu/amd_iommu_init.c
    @@ -295,7 +295,7 @@ static void iommu_write_l2(struct amd_iommu *iommu, u8 address, u32 val)
    static void iommu_set_exclusion_range(struct amd_iommu *iommu)
    {
    u64 start = iommu->exclusion_start & PAGE_MASK;
    - u64 limit = (start + iommu->exclusion_length) & PAGE_MASK;
    + u64 limit = (start + iommu->exclusion_length - 1) & PAGE_MASK;
    u64 entry;

    if (!iommu->exclusion_start)
    --
    2.20.1


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