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    Subject[PATCH 3/3] ARM: dts: rockchip: fix PWM clock found on RK3288 Socs
    Date
    From: Caesar Wang <caesar.wang@rock-chips.com>

    We use the new PWM IP on RK3288, but the PWM's clock indeed incorrect.

    Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com>
    Signed-off-by: Douglas Anderson <dianders@chromium.org>
    ---

    arch/arm/boot/dts/rk3288.dtsi | 8 ++++----
    1 file changed, 4 insertions(+), 4 deletions(-)

    diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
    index 8bce2fc49b24..efdfa3737561 100644
    --- a/arch/arm/boot/dts/rk3288.dtsi
    +++ b/arch/arm/boot/dts/rk3288.dtsi
    @@ -677,7 +677,7 @@
    #pwm-cells = <3>;
    pinctrl-names = "default";
    pinctrl-0 = <&pwm0_pin>;
    - clocks = <&cru PCLK_PWM>;
    + clocks = <&cru PCLK_RKPWM>;
    clock-names = "pwm";
    status = "disabled";
    };
    @@ -688,7 +688,7 @@
    #pwm-cells = <3>;
    pinctrl-names = "default";
    pinctrl-0 = <&pwm1_pin>;
    - clocks = <&cru PCLK_PWM>;
    + clocks = <&cru PCLK_RKPWM>;
    clock-names = "pwm";
    status = "disabled";
    };
    @@ -699,7 +699,7 @@
    #pwm-cells = <3>;
    pinctrl-names = "default";
    pinctrl-0 = <&pwm2_pin>;
    - clocks = <&cru PCLK_PWM>;
    + clocks = <&cru PCLK_RKPWM>;
    clock-names = "pwm";
    status = "disabled";
    };
    @@ -710,7 +710,7 @@
    #pwm-cells = <2>;
    pinctrl-names = "default";
    pinctrl-0 = <&pwm3_pin>;
    - clocks = <&cru PCLK_PWM>;
    + clocks = <&cru PCLK_RKPWM>;
    clock-names = "pwm";
    status = "disabled";
    };
    --
    2.21.0.392.gf8f6787159e-goog
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