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SubjectRe: [PATCH V5 00/12] perf: Add Icelake support (kernel only, except Topdown)
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On 4/8/2019 12:06 PM, Liang, Kan wrote:
> @@ -1875,7 +1868,7 @@ static void intel_pmu_drain_pebs_nhm(str
>           counts[bit]++;
>       }
> -    for (bit = 0; bit < size; bit++) {
> +    for_each_set_bit(bit, (unsigned long *)&mask, size) {
>           if ((counts[bit] == 0) && (error[bit] == 0))
>               continue;
> @@ -1939,7 +1932,7 @@ static void intel_pmu_drain_pebs_icl(str
>               counts[bit]++;
>       }
> -    for (bit = 0; bit < size; bit++) {
> +    for_each_set_bit(bit, (unsigned long *)mask, size) {
>           if (counts[bit] == 0)
>               continue;

I have finished the tests for the changes. There is one more regression
found by another typo on ICL.

Should be "for_each_set_bit(bit, (unsigned long *)&mask, size) {"

Thanks,
Kan

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