Messages in this thread | | | From | Andy Shevchenko <> | Date | Sat, 6 Apr 2019 22:11:29 +0300 | Subject | Re: [PATCH] platform/x86: intel_pmc_core: Report slp_s0 residency range |
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On Fri, Apr 5, 2019 at 8:52 PM Evan Green <evgreen@chromium.org> wrote: > On Fri, Apr 5, 2019 at 12:28 AM Rajneesh Bhardwaj > <rajneesh.bhardwaj@intel.com> wrote: > > On Mon, Apr 01, 2019 at 11:05:04AM -0700, Evan Green wrote:
> > This register is a 32 bit register untill ICL generation and a recent patch > > from Rajat fixed the overflow https://patchwork.kernel.org/patch/10816103/ > > already so i am not sure how this will help userspace. I think the userspace > > can still take care of any overflow concerns based on the information > > available about this register in EDS so i feel exposing a new debugfs entry > > just for the sake of knowing range is probably not needed. > > So you don't anticipate reusing this driver for other models where the > factor of 100 might change, or the counter might be a different width? > We can hardcode the multiply in usermode in order to detect when we've > exceeded the 4.9 day rollover range, but it seemed brittle, and would > break if this hardware implementation detail ever changed.
No user space component should ever rely on debugfs interface.
-- With Best Regards, Andy Shevchenko
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