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SubjectRe: [PATCH v3] RISC-V: Fix Maximum Physical Memory 2GiB option for 64bit systems
On Fri, Apr 5, 2019 at 11:24 AM Christoph Hellwig <> wrote:
> On Fri, Apr 05, 2019 at 05:49:34AM +0000, Anup Patel wrote:
> > The Maximum Physical Memory 2GiB option for 64bit systems is currently
> > broken because kernel hangs at boot-time when this option is enabled
> > and the underlying system has more than 2GiB memory.
> >
> > This issue can be easily reproduced on SiFive Unleashed board where
> > we have 8GiB of memory.
> >
> > This patch fixes above issue by removing unusable memory region in
> > setup_bootmem().
> >
> > Signed-off-by: Anup Patel <>
> > Reviewed-by: Christoph Hellwig <>
> Btw, what is the rationale behind even offering the 2GiB option and
> the medlow model on 64-bit? Do we reall have use cases where the
> slightly more effient generated code matters so much to keep up
> the support burden of this mostly unused and unusual configuration?

Yes, if we want to use medlow with 64bit then max physical memory
can be 2GiB. Otherwise, I don't any practical use of restricting max
physical memory to 2GiB on 64bit systems.

BTW, as-per latest revision of RISC-V priviledge spece the MMU SV32
mode will be able to access 34bit physical memory (i.e. 16GiB) so
max physical memory 2GiB will also be required for 32bit system for


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