lkml.org 
[lkml]   [2019]   [Apr]   [5]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
SubjectRE: [PATCH 1/2] stmmac: introduce flag to dynamically disable TX offload for rockchip devices
Date
From: Robin Murphy <robin.murphy@arm.com>
Date: Wed, Apr 03, 2019 at 17:12:03

> Yes, I would expect software checksumming to have a much more noticeable
> impact (in fact I've already been trying to get round to benchmarking
> some arm64 checksum optimisations on my RK3328 precisely because of this
> issue).
>

Can you share the optimizations ? 😊

> If I'm interpreting the register descriptions in the Rockchip TRMs
> correctly, it seems like no-pbl-x8 is a relatively big hammer and there
> should still be room to tune things a bit closer to the maximum limits -
> I'll have another play this evening to see if I've understood things right.

You can play around different PBL values without using the no-pbl-x8 option.

I would start with PBL=0x1 and then going up. If PBL=0x1 does not work then
add the no-pbl-x8 option and start with PBL=0x20 and keep decreasing.

Thanks,
Jose Miguel Abreu

\
 
 \ /
  Last update: 2019-04-05 12:25    [W:0.073 / U:0.616 seconds]
©2003-2018 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site