Messages in this thread | | | From | Paul Walmsley <> | Subject | [PATCH v4 0/2] clk: add driver for the SiFive FU540 PRCI and PLLs it controls | Date | Tue, 30 Apr 2019 13:50:55 -0700 |
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clk: add driver for the SiFive FU540 PRCI and PLLs it controls
Add a driver for the SiFive FU540 PRCI IP block, which handles clock and some device reset control for the SiFive FU540 chip. Also add a driver- independent library for the Analog Bits Wide-Range PLL (WRPLL), used by the PRCI driver to monitor and control the WRPLL instances on the FU540 chip.
This fourth version incorporates changes requested by Stephen Boyd <sboyd@kernel.org>. The DT bindings patch has been dropped since Stephen has already queued it.
This patch series is also available, with the binding documentation patch, at:
https://github.com/sifive/riscv-linux/tree/dev/paulw/prci-v5.1-rc7
Boot-tested on a SiFive HiFive Unleashed board, using BBL and the open-source FSBL with a mainline-focused DTB, using the following composite test branch:
https://github.com/sifive/riscv-linux/tree/dev/paulw/dts-v5.1-rc7-experimental
- Paul
Paul Walmsley (2): clk: analogbits: add Wide-Range PLL library clk: sifive: add a driver for the SiFive FU540 PRCI IP block
MAINTAINERS | 6 + drivers/clk/Kconfig | 3 + drivers/clk/Makefile | 2 + drivers/clk/analogbits/Kconfig | 2 + drivers/clk/analogbits/Makefile | 3 + drivers/clk/analogbits/wrpll-cln28hpc.c | 364 ++++++++++ drivers/clk/sifive/Kconfig | 18 + drivers/clk/sifive/Makefile | 1 + drivers/clk/sifive/fu540-prci.c | 630 ++++++++++++++++++ include/linux/clk/analogbits-wrpll-cln28hpc.h | 79 +++ 10 files changed, 1108 insertions(+) create mode 100644 drivers/clk/analogbits/Kconfig create mode 100644 drivers/clk/analogbits/Makefile create mode 100644 drivers/clk/analogbits/wrpll-cln28hpc.c create mode 100644 drivers/clk/sifive/Kconfig create mode 100644 drivers/clk/sifive/Makefile create mode 100644 drivers/clk/sifive/fu540-prci.c create mode 100644 include/linux/clk/analogbits-wrpll-cln28hpc.h
-- 2.20.1
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