Messages in this thread | | | From | Anup Patel <> | Subject | [PATCH v6 0/3] Allow accessing CSR using CSR number | Date | Thu, 25 Apr 2019 08:38:24 +0000 |
| |
This patch series adds support to access CSR using both CSR name and CSR numbers.
Also, we should prefer accessing CSRs using their CSR numbers because: 1. It compiles fine with older toolchains. 2. We can use latest CSR names in #define macro names of CSR numbers as-per RISC-V spec. (e.g. sptbr => CSR_SATP, sbadaddr => CSR_STVAL, etc.) 3. We can access newly added CSRs even if toolchain does not recognize newly addes CSRs by name. (e.g. BSSTATUS, BSIE, SSIP, etc.)
The patchset can be found in riscv_csr_number_v6 branch of https//github.com/avpatel/linux.git
Changes since v5: - Drop redundant INTERRUPT_CAUSE_FLAG from kernel/irq.c
Changes since v4: - Express SCAUSE_IRQ_FLAG in-terms of __riscv_xlen
Changes since v3: - Keep old INTERRUPT_xyz defines in kernel/irq.c for PATCH2
Changes since v2: - Dropped PATCH1 which added asm/encoding.h - Added new PATCH1 which beautifies asm/csr.h by using tabs to align macro values
Changes since v1: - Squash PATCH2 into cpatch3 - Added new PATCH2 to add interrupt related SCAUSE defines in asm/encoding.h
Anup Patel (3): RISC-V: Use tabs to align macro values in asm/csr.h RISC-V: Add interrupt related SCAUSE defines in asm/csr.h RISC-V: Access CSRs using CSR numbers
arch/riscv/include/asm/csr.h | 123 +++++++++++++++++---------- arch/riscv/include/asm/irqflags.h | 10 +-- arch/riscv/include/asm/mmu_context.h | 7 +- arch/riscv/kernel/entry.S | 22 ++--- arch/riscv/kernel/head.S | 12 +-- arch/riscv/kernel/irq.c | 16 +--- arch/riscv/kernel/perf_event.c | 4 +- arch/riscv/kernel/smp.c | 2 +- arch/riscv/kernel/traps.c | 6 +- arch/riscv/mm/fault.c | 6 +- 10 files changed, 111 insertions(+), 97 deletions(-)
-- 2.17.1
| |