lkml.org 
[lkml]   [2019]   [Apr]   [25]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
Patch in this message
/
Date
From
SubjectRe: [RFC][PATCH 4/5] mips/atomic: Fix smp_mb__{before,after}_atomic()
On Wed, Apr 24, 2019 at 09:24:31PM +0000, Paul Burton wrote:
> Hi Peter,
>
> On Wed, Apr 24, 2019 at 02:37:00PM +0200, Peter Zijlstra wrote:
> > --- a/arch/mips/include/asm/barrier.h
> > +++ b/arch/mips/include/asm/barrier.h
> > @@ -230,9 +238,6 @@
> > #define nudge_writes() mb()
> > #endif
> >
> > -#define __smp_mb__before_atomic() __smp_mb__before_llsc()
> > -#define __smp_mb__after_atomic() smp_llsc_mb()
> > -
> > /*
> > * Some Loongson 3 CPUs have a bug wherein execution of a memory access (load,
> > * store or pref) in between an ll & sc can cause the sc instruction to
>
> I think this bit should be part of patch 3, where you currently add a
> second definition of these 2 macros.

Whoops, indeed.

> Otherwise this one looks reasonable to me.

Great, thanks!

\
 
 \ /
  Last update: 2019-04-25 09:35    [W:0.072 / U:8.820 seconds]
©2003-2018 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site