Messages in this thread | | | Subject | Re: [PATCH 2/2] gpio: sch: Add interrupt support | From | Jan Kiszka <> | Date | Wed, 24 Apr 2019 16:24:16 +0200 |
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On 24.04.19 15:13, Mika Westerberg wrote: > On Wed, Apr 24, 2019 at 02:41:02PM +0200, Jan Kiszka wrote: >> On 24.04.19 12:46, Mika Westerberg wrote: >>> On Wed, Apr 24, 2019 at 12:39:35PM +0200, Jan Kiszka wrote: >>>> On 24.04.19 12:33, Mika Westerberg wrote: >>>>> On Wed, Apr 24, 2019 at 12:19:02PM +0200, Jan Kiszka wrote: >>>>>>> I think what you want is "GPIO signaled ACPI event". It works so that >>>>>>> you declare _AEI method below the GPIO controller listing the GPIOs you >>>>>>> want to trigger events for and then either _Lxx, _Exx or _EVT method for >>>>>>> each of them under the same controller. GPIO core then handles it >>>>>>> automatically when you register the GPIO chip. See also >>>>>>> acpi_gpiochip_request_interrupts(). >>>>>> >>>>>> Right, that is was I read as well. Let's assume I would be able to patch the >>>>>> tables: Would I describe all the logic of this patch in ACPI terms? Where to >>>>>> enable interrupts, how to dispatch the SCI event, how to acknowledge it >>>>>> etc.? Will it also take care of locking? (BTW, my locking seems to have some >>>>>> remaining inconsistency, on second look.) >>>>> >>>>> The GPIO core would then take care of it by requesting the GPIO in >>>>> question and dispatching to the correct event handler. In this patch you >>>>> just leave out the SCI part and only implement the irqchip like you did >>>>> already. >>>> >>>> Could you point me to a gpio driver that works like that already? Would be >>>> easier to learn that from an example. That infrastructure with all its >>>> different modes is seriously complex and not very well documented. >>> >>> Pretty much all drivers under drivers/pinctrl/intel. >> >> OK... that's a purely descriptive way. So, provided we had such ACPI table >> entries, that plus some corresponding pinctrl driver would obsolete >> gpio-sch.c? Or are there other reason than historical ones for having >> gpio-*ch.c drivers around? > > No they are for different hardware. The GPIO core will parse necessary > ACPI entires when any GPIO driver (with ACPI description) calls > gpiochip_add_data() or any of the wrappers. > >>>>>> And even if that were possible, we would be back to the square of existing >>>>>> devices without those definitions. If this were a recent chipset, I would >>>>>> say, "go, fix future firmware versions". But this one is legacy. >>>>> >>>>> Is it fixing some real issue with these legacy platforms? I mean without >>>>> the patch some GPE event is not handled properly? It was not clear to me >>>>> from the commit message. >>>>> >>>> Without that patch, you are forced to poll for event changes in your >>>> application, timer-driven. There are application that cannot process these >>>> GPIOs because they lack such logic (mraa with node-red-node-intel-gpio is a >>>> public example). >>> >>> But those are using the GPIOs via sysfs or the char device which should >>> work without the SCI handling part of your patch, no? >> >> They work via sysfs. How would the char dev compensate the missing interrupt >> support? > > I'm trying to say that for the sysfs access (well or char dev) you > should not need the sch_sci_handler() thing that is in your current > patch.
Then I'm still missing the black magic where - in my case - CGTS or RGTS are read, evaluated and written back.
And we would still need the gpio-sch driver to handle GGPE, GTNE, GTPE when edge events are requested? Is the a reference for /such/ a case? The newer Intels must be different then.
Jan
-- Siemens AG, Corporate Technology, CT RDA IOT SES-DE Corporate Competence Center Embedded Linux
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