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Subject[GIT PULL] RISC-V Patches for 5.1-rc6
The following changes since commit 15ade5d2e7775667cf191cf2f94327a4889f8b9d:

Linux 5.1-rc4 (2019-04-07 14:09:59 -1000)

are available in the Git repository at:

git:// tags/riscv-for-linus-5.1-rc6

for you to fetch changes up to f05badde4e20d2e0f8c39d07a6873b2bfb0754f8:

RISC-V: Fix Maximum Physical Memory 2GiB option for 64bit systems (2019-04-10 09:41:40 -0700)

RISC-V Patches for 5.1-rc6

This tag contains an assortment of RISC-V-related fixups that we found
after rc4. They're all really unrelated:

* The addition of a 32-bit defconfig, to emphasize testing the 32-bit
* A device tree bindings patch, which is pre-work for some patches that
target 5.2.
* A fix to support booting on systems with more physical memory than the
maximum supported by the kernel.

These work for me when merged into Linus' master from this morning,
which has no conflicts.

Anup Patel (2):
RISC-V: Add separate defconfig for 32bit systems
RISC-V: Fix Maximum Physical Memory 2GiB option for 64bit systems

Paul Walmsley (1):
dt-bindings: clock: sifive: add FU540-C000 PRCI clock constants

arch/riscv/configs/rv32_defconfig | 84 +++++++++++++++++++++++++++
arch/riscv/mm/init.c | 8 +++
include/dt-bindings/clock/sifive-fu540-prci.h | 18 ++++++
3 files changed, 110 insertions(+)
create mode 100644 arch/riscv/configs/rv32_defconfig
create mode 100644 include/dt-bindings/clock/sifive-fu540-prci.h

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